linux-kernel - Re: [PATCH 4/4] tools/perf: Support pipeline stage cycles for powerpc

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Message-ID: <YEtlEyb2z33qHhvO@krava>
Date:   Fri, 12 Mar 2021 13:56:51 +0100
From:   Jiri Olsa <jolsa@...hat.com>
To:     Athira Rajeev <atrajeev@...ux.vnet.ibm.com>
Cc:     linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        linux-perf-users@...r.kernel.org, mpe@...erman.id.au,
        acme@...nel.org, jolsa@...nel.org, maddy@...ux.ibm.com,
        ravi.bangoria@...ux.ibm.com, kjain@...ux.ibm.com,
        kan.liang@...ux.intel.com, peterz@...radead.org
Subject: Re: [PATCH 4/4] tools/perf: Support pipeline stage cycles for powerpc

On Tue, Mar 09, 2021 at 09:04:00AM -0500, Athira Rajeev wrote:
> The pipeline stage cycles details can be recorded on powerpc from
> the contents of Performance Monitor Unit (PMU) registers. On
> ISA v3.1 platform, sampling registers exposes the cycles spent in
> different pipeline stages. Patch adds perf tools support to present
> two of the cycle counter information along with memory latency (weight).
> 
> Re-use the field 'ins_lat' for storing the first pipeline stage cycle.
> This is stored in 'var2_w' field of 'perf_sample_weight'.
> 
> Add a new field 'p_stage_cyc' to store the second pipeline stage cycle
> which is stored in 'var3_w' field of perf_sample_weight.
> 
> Add new sort function 'Pipeline Stage Cycle' and include this in
> default_mem_sort_order[]. This new sort function may be used to denote
> some other pipeline stage in another architecture. So add this to
> list of sort entries that can have dynamic header string.
> 
> Signed-off-by: Athira Rajeev <atrajeev@...ux.vnet.ibm.com>
> ---
>  tools/perf/Documentation/perf-report.txt |  1 +
>  tools/perf/arch/powerpc/util/event.c     | 18 ++++++++++++++++--
>  tools/perf/util/event.h                  |  1 +
>  tools/perf/util/hist.c                   | 11 ++++++++---
>  tools/perf/util/hist.h                   |  1 +
>  tools/perf/util/session.c                |  4 +++-
>  tools/perf/util/sort.c                   | 24 ++++++++++++++++++++++--
>  tools/perf/util/sort.h                   |  2 ++
>  8 files changed, 54 insertions(+), 8 deletions(-)
> 
> diff --git a/tools/perf/Documentation/perf-report.txt b/tools/perf/Documentation/perf-report.txt
> index f546b5e9db05..9691d9c227ba 100644
> --- a/tools/perf/Documentation/perf-report.txt
> +++ b/tools/perf/Documentation/perf-report.txt
> @@ -112,6 +112,7 @@ OPTIONS
>  	- ins_lat: Instruction latency in core cycles. This is the global instruction
>  	  latency
>  	- local_ins_lat: Local instruction latency version
> +	- p_stage_cyc: Number of cycles spent in a pipeline stage.

please specify in here that it's ppc only

SNIP

> +struct sort_entry sort_p_stage_cyc = {
> +	.se_header      = "Pipeline Stage Cycle",
> +	.se_cmp         = sort__global_p_stage_cyc_cmp,
> +	.se_snprintf	= hist_entry__p_stage_cyc_snprintf,
> +	.se_width_idx	= HISTC_P_STAGE_CYC,
> +};
> +
>  struct sort_entry sort_mem_daddr_sym = {
>  	.se_header	= "Data Symbol",
>  	.se_cmp		= sort__daddr_cmp,
> @@ -1853,6 +1872,7 @@ static void sort_dimension_add_dynamic_header(struct sort_dimension *sd)
>  	DIM(SORT_CODE_PAGE_SIZE, "code_page_size", sort_code_page_size),
>  	DIM(SORT_LOCAL_INS_LAT, "local_ins_lat", sort_local_ins_lat),
>  	DIM(SORT_GLOBAL_INS_LAT, "ins_lat", sort_global_ins_lat),
> +	DIM(SORT_P_STAGE_CYC, "p_stage_cyc", sort_p_stage_cyc),

this might be out of scope for this patch, but would it make sense
to add arch specific sort dimension? so the specific column is
not even visible on arch that it's not supported on


>  };
>  
>  #undef DIM
> diff --git a/tools/perf/util/sort.h b/tools/perf/util/sort.h
> index 63f67a3f3630..23b20cbbc846 100644
> --- a/tools/perf/util/sort.h
> +++ b/tools/perf/util/sort.h
> @@ -51,6 +51,7 @@ struct he_stat {
>  	u64			period_guest_us;
>  	u64			weight;
>  	u64			ins_lat;
> +	u64			p_stage_cyc;
>  	u32			nr_events;
>  };
>  
> @@ -234,6 +235,7 @@ enum sort_type {
>  	SORT_CODE_PAGE_SIZE,
>  	SORT_LOCAL_INS_LAT,
>  	SORT_GLOBAL_INS_LAT,
> +	SORT_P_STAGE_CYC,

we could have the whole 'SORT_PEPELINE_STAGE_CYC',
so it's more obvious

thanks,
jirka