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Message-Id: <20210312142222.29643-1-noltari@gmail.com>
Date: Fri, 12 Mar 2021 15:22:22 +0100
From: Álvaro Fernández Rojas
<noltari@...il.com>
To: Florian Fainelli <f.fainelli@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Philippe Mathieu-Daudé <f4bug@...at.org>,
Paul Burton <paulburton@...nel.org>,
Jonas Gorski <jonas.gorski@...il.com>,
bcm-kernel-feedback-list@...adcom.com, linux-mips@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Álvaro Fernández Rojas
<noltari@...il.com>
Subject: [PATCH] mips: bmips: fix and improve reboot nodes
Commit a23c4134955e added the clock controller nodes, incorrectly changing the
syscon reboot nodes addresses.
- Fix syscon reboot nodes addresses (commit a23c4134955e added the clock
controller nodes, incorrectly changing the syscon reboot nodes addresses).
- Rename periph_cntl to pll_cntl and timer_cntl to soft_reset (bcm6328).
- Make syscon-reboot nodes childs of the syscon node, so that we no longer
need a phandle.
Fixes: a23c4134955e ("MIPS: BMIPS: add clock controller nodes")
Signed-off-by: Álvaro Fernández Rojas <noltari@...il.com>
---
arch/mips/boot/dts/brcm/bcm3368.dtsi | 15 +++++++--------
arch/mips/boot/dts/brcm/bcm63268.dtsi | 15 +++++++--------
arch/mips/boot/dts/brcm/bcm6328.dtsi | 15 +++++++--------
arch/mips/boot/dts/brcm/bcm6358.dtsi | 15 +++++++--------
arch/mips/boot/dts/brcm/bcm6362.dtsi | 15 +++++++--------
arch/mips/boot/dts/brcm/bcm6368.dtsi | 15 +++++++--------
6 files changed, 42 insertions(+), 48 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi
index db7e801dad55..8842ce221582 100644
--- a/arch/mips/boot/dts/brcm/bcm3368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi
@@ -60,17 +60,16 @@
#clock-cells = <1>;
};
- periph_cntl: syscon@...8c008 {
+ pll_cntl: syscon@...8c008 {
compatible = "syscon";
- reg = <0xfff8c000 0x4>;
+ reg = <0xfff8c008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@...8c008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_intc: interrupt-controller@...8c00c {
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index 575c9d3eb4c8..fabee40a3bd1 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -62,17 +62,16 @@
#clock-cells = <1>;
};
- periph_cntl: syscon@...00008 {
+ pll_cntl: syscon@...00008 {
compatible = "syscon";
- reg = <0x10000000 0xc>;
+ reg = <0x10000008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@...00008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_rst: reset-controller@...00010 {
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index fe93f2692281..393751aa3b0b 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -100,17 +100,16 @@
status = "disabled";
};
- timer: syscon@...00040 {
+ soft_reset: syscon@...00068 {
compatible = "syscon";
- reg = <0x10000040 0x2c>;
+ reg = <0x10000068 0x4>;
native-endian;
- };
- reboot: syscon-reboot@...00068 {
- compatible = "syscon-reboot";
- regmap = <&timer>;
- offset = <0x28>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
leds0: led-controller@...00800 {
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f8753becc164..8c2cb80c5b20 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -61,17 +61,16 @@
#clock-cells = <1>;
};
- periph_cntl: syscon@...e0008 {
+ pll_cntl: syscon@...e0008 {
compatible = "syscon";
- reg = <0xfffe0000 0x4>;
+ reg = <0xfffe0008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@...e0008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_intc: interrupt-controller@...e000c {
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index a2dbbf062cd8..1c42cbc654e4 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -62,17 +62,16 @@
#clock-cells = <1>;
};
- periph_cntl: syscon@...00008 {
+ pll_cntl: syscon@...00008 {
compatible = "syscon";
- reg = <0x10000000 0xc>;
+ reg = <0x10000008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@...00008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_rst: reset-controller@...00010 {
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index c4eb4b67ecbd..166dfb54f9aa 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -61,17 +61,16 @@
#clock-cells = <1>;
};
- periph_cntl: syscon@...000008 {
+ pll_cntl: syscon@...000008 {
compatible = "syscon";
- reg = <0x10000000 0xc>;
+ reg = <0x10000008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@...00008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_rst: reset-controller@...00010 {
--
2.20.1
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