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Message-ID: <1615829492-8972-2-git-send-email-spujar@nvidia.com>
Date:   Mon, 15 Mar 2021 23:01:31 +0530
From:   Sameer Pujar <spujar@...dia.com>
To:     <broonie@...nel.org>, <lgirdwood@...il.com>
CC:     <oder_chiou@...ltek.com>, <michael@...le.cc>,
        <jonathanh@...dia.com>, <kuninori.morimoto.gx@...esas.com>,
        <alsa-devel@...a-project.org>, <linux-kernel@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>, <thierry.reding@...il.com>,
        <sharadg@...dia.com>, Sameer Pujar <spujar@...dia.com>
Subject: [PATCH 1/2] ASoC: simple-card-utils: Do not handle device clock

This reverts commit 1e30f642cf29 ("ASoC: simple-card-utils: Fix device
module clock"). The original patch ended up breaking following platform,
which depends on set_sysclk() to configure internal PLL on wm8904 codec
and expects simple-card-utils to not update the MCLK rate.
 - "arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts"

It would be best if codec takes care of setting MCLK clock via DAI
set_sysclk() callback.

Reported-by: Michael Walle <michael@...le.cc>
Suggested-by: Mark Brown <broonie@...nel.org>
Suggested-by: Michael Walle <michael@...le.cc>
Fixes: 1e30f642cf29 ("ASoC: simple-card-utils: Fix device module clock")
Signed-off-by: Sameer Pujar <spujar@...dia.com>
---
 sound/soc/generic/simple-card-utils.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c
index ab31045..6cada4c 100644
--- a/sound/soc/generic/simple-card-utils.c
+++ b/sound/soc/generic/simple-card-utils.c
@@ -172,15 +172,16 @@ int asoc_simple_parse_clk(struct device *dev,
 	 *  or device's module clock.
 	 */
 	clk = devm_get_clk_from_child(dev, node, NULL);
-	if (IS_ERR(clk))
-		clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
-
 	if (!IS_ERR(clk)) {
-		simple_dai->clk = clk;
 		simple_dai->sysclk = clk_get_rate(clk);
-	} else if (!of_property_read_u32(node, "system-clock-frequency",
-					 &val)) {
+
+		simple_dai->clk = clk;
+	} else if (!of_property_read_u32(node, "system-clock-frequency", &val)) {
 		simple_dai->sysclk = val;
+	} else {
+		clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
+		if (!IS_ERR(clk))
+			simple_dai->sysclk = clk_get_rate(clk);
 	}
 
 	if (of_property_read_bool(node, "system-clock-direction-out"))
-- 
2.7.4

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