linux-kernel - Re: [PATCH v5] mfd: da9063: Support SMBus and I2C mode

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Message-ID: <20210315183115.GA2343@kunai>
Date:   Mon, 15 Mar 2021 19:31:15 +0100
From:   Wolfram Sang <wsa@...nel.org>
To:     Mark Jonas <mark.jonas@...bosch.com>
Cc:     Support Opensource <support.opensource@...semi.com>,
        Lee Jones <lee.jones@...aro.org>, linux-kernel@...r.kernel.org,
        linux-i2c@...r.kernel.org, Adam.Thomson.Opensource@...semi.com,
        stwiss.opensource@...semi.com, marek.vasut@...il.com,
        tingquan.ruan@...bosch.com, hubert.streidl@...bosch.com
Subject: Re: [PATCH v5] mfd: da9063: Support SMBus and I2C mode

On Mon, Mar 15, 2021 at 05:09:03PM +0100, Mark Jonas wrote:
> From: Hubert Streidl <hubert.streidl@...bosch.com>
> 
> By default the PMIC DA9063 2-wire interface is SMBus compliant. This
> means the PMIC will automatically reset the interface when the clock
> signal ceases for more than the SMBus timeout of 35 ms.
> 
> If the I2C driver / device is not capable of creating atomic I2C
> transactions, a context change can cause a ceasing of the clock signal.
> This can happen if for example a real-time thread is scheduled. Then
> the DA9063 in SMBus mode will reset the 2-wire interface. Subsequently
> a write message could end up in the wrong register. This could cause
> unpredictable system behavior.
> 
> The DA9063 PMIC also supports an I2C compliant mode for the 2-wire
> interface. This mode does not reset the interface when the clock
> signal ceases. Thus the problem depicted above does not occur.
> 
> This patch tests for the bus functionality "I2C_FUNC_I2C". It can
> reasonably be assumed that the bus cannot obey SMBus timings if
> this functionality is set. SMBus commands most probably are emulated
> in this case which is prone to the latency issue described above.
> 
> This patch enables the I2C bus mode if I2C_FUNC_I2C is set or
> otherwise keeps the default SMBus mode.
> 
> Signed-off-by: Hubert Streidl <hubert.streidl@...bosch.com>
> Signed-off-by: Mark Jonas <mark.jonas@...bosch.com>

From an I2C point of view, this is the correct approach:

Reviewed-by: Wolfram Sang <wsa+renesas@...g-engineering.com>


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