lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1615805214-24857-7-git-send-email-srinivas.neeli@xilinx.com>
Date:   Mon, 15 Mar 2021 16:16:51 +0530
From:   Srinivas Neeli <srinivas.neeli@...inx.com>
To:     <linux@...ck-us.net>, <michal.simek@...inx.com>,
        <shubhrajyoti.datta@...inx.com>, <sgoud@...inx.com>
CC:     <wim@...ux-watchdog.org>, <linux-watchdog@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <git@...inx.com>,
        Srinivas Neeli <srinivas.neeli@...inx.com>
Subject: [PATCH 6/9] dt-bindings: watchdog: xilinx: Add binding for Versal watchdog

Updated watchdog binding for Versal window watchdog.

Signed-off-by: Srinivas Neeli <srinivas.neeli@...inx.com>
---
 .../devicetree/bindings/watchdog/of-xilinx-wdt.txt | 33 ++++++++++++++++++++--
 1 file changed, 30 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt b/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt
index c6ae9c9d5e3e..57903645d685 100644
--- a/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt
@@ -1,21 +1,37 @@
-Xilinx AXI/PLB soft-core watchdog Device Tree Bindings
----------------------------------------------------------
+Xilinx AXI/PLB soft-core watchdog and window watchdog Device Tree Bindings
+--------------------------------------------------------------------------
 
 Required properties:
 - compatible		: Should be "xlnx,xps-timebase-wdt-1.00.a" or
-			  "xlnx,xps-timebase-wdt-1.01.a".
+			  "xlnx,xps-timebase-wdt-1.01.a" or
+			  "xlnx,versal-wwdt-1.0".
 - reg			: Physical base address and size
 
 Optional properties:
 - clocks		: Input clock specifier. Refer to common clock
 			  bindings.
 - clock-frequency	: Frequency of clock in Hz
+
+Optional properties for AXI/PLB soft-core watchdog:
 - xlnx,wdt-enable-once	: 0 - Watchdog can be restarted
 			  1 - Watchdog can be enabled just once
 - xlnx,wdt-interval	: Watchdog timeout interval in 2^<val> clock cycles,
 			  <val> is integer from 8 to 31.
 
+Optional properties for window watchdog:
+- timeout-sec          : Watchdog timeout value (in seconds).
+			 if unset, the default timeout is 10 seconds.
+- pretimeout-sec	: Watchdog pretimeout value in seconds.
+- interrupts		: IRQ line for the WWDT.
+- interrupt-names	: Interrupt line names "wdt" or "wwdt_reset_pending".
+			  wdt - will assert high after first (closed) window
+			  timer expires. wwdt_reset_pending - will assert high
+			  after second (open) window timer expires if WRP
+			  (Watchdog Reset pending) is configured with third
+			  (SST) timer.
+
 Example:
+Xilinx AXI/PLB soft-core watchdog:
 axi-timebase-wdt@...00000 {
 	clock-frequency = <50000000>;
 	compatible = "xlnx,xps-timebase-wdt-1.00.a";
@@ -24,3 +40,14 @@ axi-timebase-wdt@...00000 {
 	xlnx,wdt-enable-once = <0x0>;
 	xlnx,wdt-interval = <0x1b>;
 } ;
+
+Xilinx Versal window watchdog:
+watchdog@...d0000 {
+	compatible = "xlnx,versal-wwdt-1.0";
+	reg = <0x0 0xfd4d0000 0x0 0x10000>;
+	clocks = <&clk25>;
+	timeout-sec = <10>;
+	interrupt-names = "wdt", "wwdt_reset_pending";
+	interrupts = <0x0 0x64 0x1>, <0x0 0x6D 0x1>;
+	pretimeout-sec = <5>;
+} ;
-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ