[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20210315120149.10606-1-vigneshr@ti.com>
Date: Mon, 15 Mar 2021 17:31:48 +0530
From: Vignesh Raghavendra <vigneshr@...com>
To: Nishanth Menon <nm@...com>, Tero Kristo <kristo@...nel.org>
CC: Rob Herring <robh+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Vignesh Raghavendra <vigneshr@...com>
Subject: [RESEND PATCH 1/2] arm64: dts: ti: k3-am64-main: Add OSPI node
AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem
(FSS). Add DT entry for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@...com>
Reviewed-by: Pratyush Yadav <p.yadav@...com>
---
Resend:
Rebase onto latest -next
v1: lore.kernel.org/r/20210309130514.11740-1-vigneshr@...com
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 25 ++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 1f33b8d0080b..d914a58680aa 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -508,4 +508,29 @@ adc {
compatible = "ti,am654-adc", "ti,am3359-adc";
};
};
+
+ fss: bus@...0000 {
+ compatible = "simple-bus";
+ reg = <0x00 0x0fc00000 0x00 0x70000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ospi0: spi@...0000 {
+ compatible = "ti,am654-ospi", "cdns,qspi-nor";
+ reg = <0x00 0x0fc40000 0x00 0x100>,
+ <0x05 0x00000000 0x01 0x00000000>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ cdns,fifo-depth = <256>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x0>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ clocks = <&k3_clks 75 6>;
+ assigned-clocks = <&k3_clks 75 6>;
+ assigned-clock-parents = <&k3_clks 75 7>;
+ assigned-clock-rates = <166666666>;
+ power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
+ };
+ };
};
--
2.30.2
Powered by blists - more mailing lists