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Message-ID: <f1ee6230-760e-b614-5290-663b44fe1436@redhat.com>
Date: Tue, 16 Mar 2021 09:16:48 +0100
From: Paolo Bonzini <pbonzini@...hat.com>
To: Maxim Levitsky <mlevitsk@...hat.com>, kvm@...r.kernel.org
Cc: "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Sean Christopherson <seanjc@...gle.com>,
Ingo Molnar <mingo@...hat.com>,
Jim Mattson <jmattson@...gle.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Joerg Roedel <joro@...tes.org>,
Thomas Gleixner <tglx@...utronix.de>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@...r.kernel.org>, Wanpeng Li <wanpengli@...cent.com>,
Borislav Petkov <bp@...en8.de>
Subject: Re: [PATCH 2/2] KVM: nSVM: improve SYSENTER emulation on AMD
On 15/03/21 19:19, Maxim Levitsky wrote:
> On Mon, 2021-03-15 at 18:56 +0100, Paolo Bonzini wrote:
>> On 15/03/21 18:43, Maxim Levitsky wrote:
>>> + if (!guest_cpuid_is_intel(vcpu)) {
>>> + /*
>>> + * If hardware supports Virtual VMLOAD VMSAVE then enable it
>>> + * in VMCB and clear intercepts to avoid #VMEXIT.
>>> + */
>>> + if (vls) {
>>> + svm_clr_intercept(svm, INTERCEPT_VMLOAD);
>>> + svm_clr_intercept(svm, INTERCEPT_VMSAVE);
>>> + svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
>>> + }
>>> + /* No need to intercept these msrs either */
>>> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SYSENTER_EIP, 1, 1);
>>> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SYSENTER_ESP, 1, 1);
>>> + }
>>
>> An "else" is needed here to do the opposite setup (removing the "if
>> (vls)" from init_vmcb).
>
> init_vmcb currently set the INTERCEPT_VMLOAD and INTERCEPT_VMSAVE and it doesn't enable vls
There's also this towards the end of the function:
/*
* If hardware supports Virtual VMLOAD VMSAVE then enable it
* in VMCB and clear intercepts to avoid #VMEXIT.
*/
if (vls) {
svm_clr_intercept(svm, INTERCEPT_VMLOAD);
svm_clr_intercept(svm, INTERCEPT_VMSAVE);
svm->vmcb->control.virt_ext |=
VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
}
> thus there is nothing to do if I don't want to enable vls.
> It seems reasonable to me.
>
> Both msrs I marked as '.always = false' in the
> 'direct_access_msrs', which makes them be intercepted by the default.
> If I were to use '.always = true' it would feel a bit wrong as the intercept is not always
> enabled.
I agree that .always = false is correct.
> What do you think?
You can set the CPUID multiple times, so you could go from AMD to Intel
and back.
Thanks,
Paolo
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