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Message-ID: <CAAOTY_8pt5Vm9Xjy-c4kLV0qcmVJQp4Pj2=gokrnuGrdrYD7Nw@mail.gmail.com>
Date:   Wed, 17 Mar 2021 23:34:38 +0800
From:   Chun-Kuang Hu <chunkuang.hu@...nel.org>
To:     Rex-BC Chen <rex-bc.chen@...iatek.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        DTML <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Pi-Hsun Shih <pihsun@...omium.org>,
        Jitao Shi <jitao.shi@...iatek.com>
Subject: Re: [RESEND,v4,1/2] drm/mediatek: mtk_dpi: Add check for max clock
 rate in mode_valid

Hi, Rex:

Rex-BC Chen <rex-bc.chen@...iatek.com> 於 2021年3月16日 週二 上午11:26寫道:
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
>
> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@...nel.org>
> Signed-off-by: Pi-Hsun Shih <pihsun@...omium.org>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index b05f900d9322..e1945d4bd7c4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
>  struct mtk_dpi_conf {
>         unsigned int (*cal_factor)(int clock);
>         u32 reg_h_fre_con;
> +       u32 max_clock_khz;
>         bool edge_sel_en;
>  };
>
> @@ -557,9 +558,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
>         mtk_dpi_set_display_mode(dpi, &dpi->mode);
>  }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> +                         const struct drm_display_mode *mode)
> +{
> +       struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> +       if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
> +               return MODE_CLOCK_HIGH;
> +
> +       return MODE_OK;
> +}
> +
>  static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
>         .attach = mtk_dpi_bridge_attach,
>         .mode_set = mtk_dpi_bridge_mode_set,
> +       .mode_valid = mtk_dpi_bridge_mode_valid,

Build error:

../drivers/gpu/drm/mediatek/mtk_dpi.c:576:16: error: initialization
from incompatible pointer type [-Werror=incompatible-pointer-types]
  .mode_valid = mtk_dpi_bridge_mode_valid,
                ^~~~~~~~~~~~~~~~~~~~~~~~~

Please remove my 'Reviewed-by' tag.

Regards,
Chun-Kuang.

>         .disable = mtk_dpi_bridge_disable,
>         .enable = mtk_dpi_bridge_enable,
>  };
> @@ -668,17 +682,20 @@ static unsigned int mt8183_calculate_factor(int clock)
>  static const struct mtk_dpi_conf mt8173_conf = {
>         .cal_factor = mt8173_calculate_factor,
>         .reg_h_fre_con = 0xe0,
> +       .max_clock_khz = 300000,
>  };
>
>  static const struct mtk_dpi_conf mt2701_conf = {
>         .cal_factor = mt2701_calculate_factor,
>         .reg_h_fre_con = 0xb0,
>         .edge_sel_en = true,
> +       .max_clock_khz = 150000,
>  };
>
>  static const struct mtk_dpi_conf mt8183_conf = {
>         .cal_factor = mt8183_calculate_factor,
>         .reg_h_fre_con = 0xe0,
> +       .max_clock_khz = 100000,
>  };
>
>  static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.18.0
>

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