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Message-ID: <584010c9-dcb0-853a-8f17-72b3ba3264a1@roeck-us.net>
Date: Wed, 17 Mar 2021 12:20:18 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: Badhri Jagan Sridharan <badhri@...gle.com>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] usb: typec: tcpci: Added few missing TCPCI register
definitions
On 3/16/21 3:13 PM, Badhri Jagan Sridharan wrote:
> This change adds some of the register bit definitions from the TCPCI spec:
> https://www.usb.org/sites/default/files/documents/
> usb-port_controller_specification_rev2.0_v1.0_0.pdf
>
> Signed-off-by: Badhri Jagan Sridharan <badhri@...gle.com>
Reviewed-by: Guenter Roeck <linux@...ck-us.net>
> ---
> drivers/usb/typec/tcpm/tcpci.h | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/usb/typec/tcpm/tcpci.h b/drivers/usb/typec/tcpm/tcpci.h
> index 57b6e24e0a0c..2be7a77d400e 100644
> --- a/drivers/usb/typec/tcpm/tcpci.h
> +++ b/drivers/usb/typec/tcpm/tcpci.h
> @@ -47,7 +47,10 @@
>
> #define TCPC_TCPC_CTRL 0x19
> #define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
> +#define PLUG_ORNT_CC1 0
> +#define PLUG_ORNT_CC2 1
> #define TCPC_TCPC_CTRL_BIST_TM BIT(1)
> +#define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT BIT(6)
>
> #define TCPC_EXTENDED_STATUS 0x20
> #define TCPC_EXTENDED_STATUS_VSAFE0V BIT(0)
> @@ -74,21 +77,28 @@
> #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
> #define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3)
> #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4)
> +#define TCPC_DIS_VOLT_ALRM BIT(5)
> +#define TCPC_POWER_CTRL_VBUS_VOLT_MON BIT(6)
> #define TCPC_FAST_ROLE_SWAP_EN BIT(7)
>
> #define TCPC_CC_STATUS 0x1d
> #define TCPC_CC_STATUS_TOGGLING BIT(5)
> #define TCPC_CC_STATUS_TERM BIT(4)
> +#define TCPC_CC_STATUS_TERM_RP 0
> +#define TCPC_CC_STATUS_TERM_RD 1
> +#define TCPC_CC_STATE_SRC_OPEN 0
> #define TCPC_CC_STATUS_CC2_SHIFT 2
> #define TCPC_CC_STATUS_CC2_MASK 0x3
> #define TCPC_CC_STATUS_CC1_SHIFT 0
> #define TCPC_CC_STATUS_CC1_MASK 0x3
>
> #define TCPC_POWER_STATUS 0x1e
> +#define TCPC_POWER_STATUS_DBG_ACC_CON BIT(7)
> #define TCPC_POWER_STATUS_UNINIT BIT(6)
> #define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4)
> #define TCPC_POWER_STATUS_VBUS_DET BIT(3)
> #define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
> +#define TCPC_POWER_STATUS_SINKING_VBUS BIT(0)
>
> #define TCPC_FAULT_STATUS 0x1f
>
> @@ -121,6 +131,10 @@
> #define TCPC_RX_DETECT 0x2f
> #define TCPC_RX_DETECT_HARD_RESET BIT(5)
> #define TCPC_RX_DETECT_SOP BIT(0)
> +#define TCPC_RX_DETECT_SOP1 BIT(1)
> +#define TCPC_RX_DETECT_SOP2 BIT(2)
> +#define TCPC_RX_DETECT_DBG1 BIT(3)
> +#define TCPC_RX_DETECT_DBG2 BIT(4)
>
> #define TCPC_RX_BYTE_CNT 0x30
> #define TCPC_RX_BUF_FRAME_TYPE 0x31
> @@ -139,6 +153,8 @@
> #define TCPC_TX_DATA 0x54 /* through 0x6f */
>
> #define TCPC_VBUS_VOLTAGE 0x70
> +#define TCPC_VBUS_VOLTAGE_MASK 0x3ff
> +#define TCPC_VBUS_VOLTAGE_LSB_MV 25
> #define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
> #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV 25
> #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX 0x3ff
>
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