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Message-Id: <20210317025159.2248-4-zhangqing@rock-chips.com>
Date: Wed, 17 Mar 2021 10:51:59 +0800
From: Elaine Zhang <zhangqing@...k-chips.com>
To: robh+dt@...nel.org, heiko@...ech.de
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
cl@...k-chips.com, huangtao@...k-chips.com,
kever.yang@...k-chips.com, tony.xie@...k-chips.com,
finley.xiao@...k-chips.com, Elaine Zhang <zhangqing@...k-chips.com>
Subject: [PATCH v1 3/3] soc: rockchip: power-domain: add rk3568 powerdomains
Add power-domains found on rk3568 socs.
Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
---
drivers/soc/rockchip/pm_domains.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 54eb6cfc5d5b..a2c19c845cf2 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -27,6 +27,7 @@
#include <dt-bindings/power/rk3366-power.h>
#include <dt-bindings/power/rk3368-power.h>
#include <dt-bindings/power/rk3399-power.h>
+#include <dt-bindings/power/rk3568-power.h>
struct rockchip_domain_info {
int pwr_mask;
@@ -131,6 +132,9 @@ struct rockchip_pmu {
#define DOMAIN_RK3399(pwr, status, req, wakeup) \
DOMAIN(pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3568(pwr, req, wakeup) \
+ DOMAIN_M(pwr, pwr, req, req, req, wakeup)
+
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
struct rockchip_pmu *pmu = pd->pmu;
@@ -841,6 +845,18 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
[RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399(BIT(31), BIT(31), BIT(29), true),
};
+static const struct rockchip_domain_info rk3568_pm_domains[] = {
+ [RK3568_PD_NPU] = DOMAIN_RK3568(BIT(1), BIT(2), false),
+ [RK3568_PD_GPU] = DOMAIN_RK3568(BIT(0), BIT(1), false),
+ [RK3568_PD_VI] = DOMAIN_RK3568(BIT(6), BIT(3), false),
+ [RK3568_PD_VO] = DOMAIN_RK3568(BIT(7), BIT(4), false),
+ [RK3568_PD_RGA] = DOMAIN_RK3568(BIT(5), BIT(5), false),
+ [RK3568_PD_VPU] = DOMAIN_RK3568(BIT(2), BIT(6), false),
+ [RK3568_PD_RKVDEC] = DOMAIN_RK3568(BIT(4), BIT(8), false),
+ [RK3568_PD_RKVENC] = DOMAIN_RK3568(BIT(3), BIT(7), false),
+ [RK3568_PD_PIPE] = DOMAIN_RK3568(BIT(8), BIT(11), false),
+};
+
static const struct rockchip_pmu_info px30_pmu = {
.pwr_offset = 0x18,
.status_offset = 0x20,
@@ -976,6 +992,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
.domain_info = rk3399_pm_domains,
};
+static const struct rockchip_pmu_info rk3568_pmu = {
+ .pwr_offset = 0xa0,
+ .status_offset = 0x98,
+ .req_offset = 0x50,
+ .idle_offset = 0x68,
+ .ack_offset = 0x60,
+
+ .num_domains = ARRAY_SIZE(rk3568_pm_domains),
+ .domain_info = rk3568_pm_domains,
+};
+
static const struct of_device_id rockchip_pm_domain_dt_match[] = {
{
.compatible = "rockchip,px30-power-controller",
@@ -1021,6 +1048,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
.compatible = "rockchip,rk3399-power-controller",
.data = (void *)&rk3399_pmu,
},
+ {
+ .compatible = "rockchip,rk3568-power-controller",
+ .data = (void *)&rk3568_pmu,
+ },
{ /* sentinel */ },
};
--
2.17.1
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