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Message-ID: <7df3a270-1cc4-7a71-5e55-49a0dfb2c21f@kernel.org>
Date: Wed, 17 Mar 2021 10:19:46 +0200
From: Tomi Valkeinen <tomba@...nel.org>
To: Dario Binacchi <dariobin@...ero.it>, linux-kernel@...r.kernel.org,
Jyri Sarha <jyri.sarha@....fi>
Cc: Daniel Vetter <daniel@...ll.ch>, David Airlie <airlied@...ux.ie>,
dri-devel@...ts.freedesktop.org
Subject: Re: [PATCH] drm/tilcdc: fix LCD pixel clock setting
On 14/03/2021 17:13, Dario Binacchi wrote:
> As reported by TI spruh73x RM, the LCD pixel clock (LCD_PCLK) frequency
> is obtained by dividing LCD_CLK, the LCD controller reference clock,
> for CLKDIV:
>
> LCD_PCLK = LCD_CLK / CLKDIV
>
> where CLKDIV must be greater than 1.
>
> Therefore LCD_CLK must be set to 'req_rate * CLKDIV' instead of req_rate
The above doesn't make sense, the code already sets LCD_CLK to 'req_rate
* clkdiv', not req_rate.
> and the real LCD_CLK rate must be compared with 'req_rate * CLKDIV' and
> not with req_rate.
This is true, the code looks at the wrong value.
> Passing req_rate instead of 'req_rate * CLKDIV' to the tilcdc_pclk_diff
> routine caused it to fail even if LCD_CLK was properly set.
>
> Signed-off-by: Dario Binacchi <dariobin@...ero.it>
>
> ---
>
> drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index 30213708fc99..02f56c9a5da5 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
> struct drm_device *dev = crtc->dev;
> struct tilcdc_drm_private *priv = dev->dev_private;
> struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
> - unsigned long clk_rate, real_rate, req_rate;
> + unsigned long clk_rate, real_rate, req_rate, clk_div_rate;
> unsigned int clkdiv;
> int ret;
>
> @@ -211,10 +211,11 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
>
> /* mode.clock is in KHz, set_rate wants parameter in Hz */
> req_rate = crtc->mode.clock * 1000;
> -
> - ret = clk_set_rate(priv->clk, req_rate * clkdiv);
> + /* LCD clock divisor input rate */
> + clk_div_rate = req_rate * clkdiv;
"clk_div_rate" sounds a bit odd to me. Why not lcd_fck_rate, as that's
the name used later? Or lcd_clk_rate. Or maybe lcd_clk_req_rate...
> + ret = clk_set_rate(priv->clk, clk_div_rate);
> clk_rate = clk_get_rate(priv->clk);
> - if (ret < 0 || tilcdc_pclk_diff(req_rate, clk_rate) > 5) {
> + if (ret < 0 || tilcdc_pclk_diff(clk_div_rate, clk_rate) > 5) {
> /*
> * If we fail to set the clock rate (some architectures don't
> * use the common clock framework yet and may not implement
>
I think this fix is fine, but looking at the current code, it's calling
tilcdc_pclk_diff(), but doesn't actually provide pixel clocks to the
function, but fclk.
Tomi
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