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Date:   Thu, 18 Mar 2021 08:54:09 +0000
From:   "Longpeng (Mike, Cloud Infrastructure Service Product Dept.)" 
        <longpeng2@...wei.com>
To:     "Tian, Kevin" <kevin.tian@...el.com>,
        Nadav Amit <nadav.amit@...il.com>
CC:     chenjiashang <chenjiashang@...wei.com>,
        David Woodhouse <dwmw2@...radead.org>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
        LKML <linux-kernel@...r.kernel.org>,
        "alex.williamson@...hat.com" <alex.williamson@...hat.com>,
        "Gonglei (Arei)" <arei.gonglei@...wei.com>,
        "will@...nel.org" <will@...nel.org>
Subject: RE: A problem of Intel IOMMU hardware ?



> -----Original Message-----
> From: Tian, Kevin [mailto:kevin.tian@...el.com]
> Sent: Thursday, March 18, 2021 4:43 PM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
> <longpeng2@...wei.com>; Nadav Amit <nadav.amit@...il.com>
> Cc: chenjiashang <chenjiashang@...wei.com>; David Woodhouse
> <dwmw2@...radead.org>; iommu@...ts.linux-foundation.org; LKML
> <linux-kernel@...r.kernel.org>; alex.williamson@...hat.com; Gonglei (Arei)
> <arei.gonglei@...wei.com>; will@...nel.org
> Subject: RE: A problem of Intel IOMMU hardware ?
> 
> > From: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
> > <longpeng2@...wei.com>
> >
> >
> > > -----Original Message-----
> > > From: Tian, Kevin [mailto:kevin.tian@...el.com]
> > > Sent: Thursday, March 18, 2021 4:27 PM
> > > To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
> > > <longpeng2@...wei.com>; Nadav Amit <nadav.amit@...il.com>
> > > Cc: chenjiashang <chenjiashang@...wei.com>; David Woodhouse
> > > <dwmw2@...radead.org>; iommu@...ts.linux-foundation.org; LKML
> > > <linux-kernel@...r.kernel.org>; alex.williamson@...hat.com; Gonglei
> > (Arei)
> > > <arei.gonglei@...wei.com>; will@...nel.org
> > > Subject: RE: A problem of Intel IOMMU hardware ?
> > >
> > > > From: iommu <iommu-bounces@...ts.linux-foundation.org> On Behalf
> > > > Of Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
> > > >
> > > > > 2. Consider ensuring that the problem is not somehow related to
> > > > > queued invalidations. Try to use __iommu_flush_iotlb() instead
> > > > > of
> > > qi_flush_iotlb().
> > > > >
> > > >
> > > > I tried to force to use __iommu_flush_iotlb(), but maybe something
> > > > wrong, the system crashed, so I prefer to lower the priority of
> > > > this
> > operation.
> > > >
> > >
> > > The VT-d spec clearly says that register-based invalidation can be
> > > used only
> > when
> > > queued-invalidations are not enabled. Intel-IOMMU driver doesn't
> > > provide
> > an
> > > option to disable queued-invalidation though, when the hardware is
> > capable. If you
> > > really want to try, tweak the code in intel_iommu_init_qi.
> > >
> >
> > Hi Kevin,
> >
> > Thanks to point out this. Do you have any ideas about this problem ? I
> > tried to descript the problem much clear in my reply to Alex, hope you
> > could have a look if you're interested.
> >
> 
> I agree with Nadav. Looks this implies some stale paging structure cache entry (e.g.
> PMD) is not invalidated properly. It's better if Baolu can reproduce this problem in
> his local environment and then do more debug to identify whether it's a software or
> hardware defect.
> 
> btw what is the device under test? Does it support ATS?
> 

The device is our offload card, it does not support ATS cap.

> Thanks
> Kevin

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