lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YFNEpRILOTwh3svv@krava>
Date:   Thu, 18 Mar 2021 13:16:37 +0100
From:   Jiri Olsa <jolsa@...hat.com>
To:     Arnaldo Carvalho de Melo <acme@...nel.org>
Cc:     "Jin, Yao" <yao.jin@...ux.intel.com>, jolsa@...nel.org,
        peterz@...radead.org, mingo@...hat.com,
        alexander.shishkin@...ux.intel.com, Linux-kernel@...r.kernel.org,
        ak@...ux.intel.com, kan.liang@...el.com, yao.jin@...el.com
Subject: Re: [PATCH v2 11/27] perf parse-events: Support hardware events
 inside PMU

On Wed, Mar 17, 2021 at 10:42:45AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Mar 17, 2021 at 08:17:52PM +0800, Jin, Yao escreveu:
> > Hi Jiri,
> > 
> > On 3/17/2021 6:06 PM, Jiri Olsa wrote:
> > > On Wed, Mar 17, 2021 at 10:12:03AM +0800, Jin, Yao wrote:
> > > > 
> > > > 
> > > > On 3/16/2021 10:04 PM, Jiri Olsa wrote:
> > > > > On Tue, Mar 16, 2021 at 09:49:42AM +0800, Jin, Yao wrote:
> > > > > 
> > > > > SNIP
> > > > > 
> > > > > > 
> > > > > >    Performance counter stats for 'system wide':
> > > > > > 
> > > > > >          136,655,302      cpu_core/branch-instructions/
> > > > > > 
> > > > > >          1.003171561 seconds time elapsed
> > > > > > 
> > > > > > So we need special rules for both cycles and branches.
> > > > > > 
> > > > > > The worse thing is, we also need to process the hardware cache events.
> > > > > > 
> > > > > > # ./perf stat -e cpu_core/LLC-loads/
> > > > > > event syntax error: 'cpu_core/LLC-loads/'
> > > > > >                                 \___ unknown term 'LLC-loads' for pmu 'cpu_core'
> > > > > > 
> > > > > > valid terms: event,pc,edge,offcore_rsp,ldlat,inv,umask,frontend,cmask,config,config1,config2,name,period,percore
> > > > > > 
> > > > > > Initial error:
> > > > > > event syntax error: 'cpu_core/LLC-loads/'
> > > > > >                                 \___ unknown term 'LLC-loads' for pmu 'cpu_core'
> > > > > > 
> > > > > > If we use special rules for establishing all event mapping, that looks too much. :(
> > > > > 
> > > > > hmmm but wait, currently we do not support events like this:
> > > > > 
> > > > >     'cpu/cycles/'
> > > > >     'cpu/branches/'
> > > > > 
> > > > > the pmu style accepts only 'events' or 'format' terms within //
> > > > > 
> > > > > we made hw events like 'cycles','instructions','branches' special
> > > > > to be used without the pmu
> > > > > 
> > > > > so why do we need to support cpu_code/cycles/ ?
> 
> > > > Actually we have to support pmu style event for hybrid platform.
> 
> > > > User may want to enable the events from specified pmus and also with flexible grouping.
> 
> > > > For example,
> 
> > > > perf stat -e '{cpu_core/cycles/,cpu_core/instructions/}' -e '{cpu_atom/cycles/,cpu_atom/instructions/}'
> 
> > > > This usage is common and reasonable. So I think we may need to support pmu style events.
> 
> > > sure, but we don't support 'cpu/cycles/' but we support 'cpu/cpu-cycles/'
> > > why do you insist on supporting cpu_core/cycles/ ?
> 
> > 
> > I'm OK to only support 'cpu_core/cpu-cycles/' or 'cpu_atom/cpu-cycles/'. But
> > what would we do for cache event?
> > 
> > 'perf stat -e LLC-loads' is OK, but 'perf stat -e cpu/LLC-loads/' is not supported currently.
> > 
> > For hybrid platform, user may only want to enable the LLC-loads on core CPUs
> > or on atom CPUs. That's reasonable. While if we don't support the pmu style
> > event, how to satisfy this requirement?
> > 
> > If we can support the pmu style event, we can also use the same way for
> > cpu_core/cycles/. At least it's not a bad thing, right? :)
> 
> While we're discussing, do we really want to use the "core" and "atom"
> terms here? I thought cpu/cycles/ would be ok for the main (Big) CPU and
> that we should come up with some short name for the "litle" CPUs.
> 
> Won't we have the same situation with ARM where we want to know the
> number of cycles spent on a BIG core and also on a little one?
> 
> Perhaps 'cycles' should mean all cycles, and then we use 'big/cycles/' and
> 'little/cycles/'?

do arm servers already export multiple pmus like this?
I did not notice

it'd be definitely great to have some unite way for this,
so far we have the hybrid pmu detection and support in
hw events like cycles/instructions.. which should be easy
to follow on arm

there's also support to have these events on specific pmu
pmu/cycles/ , which I still need to check on

jirka

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ