linux-kernel - Re: [PATCH v4] RISC-V: enable XIP

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Message-ID: <20210321202103.GA121213@roeck-us.net>
Date:   Sun, 21 Mar 2021 13:21:03 -0700
From:   Guenter Roeck <linux@...ck-us.net>
To:     Vitaly Wool <vitaly.wool@...sulko.com>
Cc:     linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Bin Meng <bin.meng@...driver.com>,
        Anup Patel <anup@...infault.org>,
        Alistair Francis <alistair.francis@....com>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        Nicolas Pitre <nico@...xnic.net>
Subject: Re: [PATCH v4] RISC-V: enable XIP

On Sat, Mar 06, 2021 at 02:14:38PM +0200, Vitaly Wool wrote:
> Introduce XIP (eXecute In Place) support for RISC-V platforms.
> It allows code to be executed directly from non-volatile storage
> directly addressable by the CPU, such as QSPI NOR flash which can
> be found on many RISC-V platforms. This makes way for significant
> optimization of RAM footprint. The XIP kernel is not compressed
> since it has to run directly from flash, so it will occupy more
> space on the non-volatile storage to The physical flash address
> used to link the kernel object files and for storing it has to
> be known at compile time and is represented by a Kconfig option.
> 
> XIP on RISC-V will currently only work on MMU-enabled kernels.
> 
> Signed-off-by: Vitaly Wool <vitaly.wool@...sulko.com>
> ---

The impact of this patch on RISC-V images running in qemu is quite fatal.

[    0.000000] Linux version 5.12.0-rc3-next-20210319 (groeck@...urn.roeck-us.net) (riscv64-linux-gcc (GCC) 9.3.0, GNU ld (GNU Binutils) 2.34) #1 SMP Fri Mar 19 04:01:41 PDT 2021
[    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
[    0.000000] Machine model: riscv-virtio,qemu
[    0.000000] earlycon: uart8250 at MMIO 0x0000000010000000 (options '115200')
[    0.000000] printk: bootconsole [uart8250] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] Unable to handle kernel paging request at virtual address 0000000040000001
[    0.000000] Oops [#1]
[    0.000000] Modules linked in:
[    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.12.0-rc3-next-20210319 #1
[    0.000000] Hardware name: riscv-virtio,qemu (DT)
[    0.000000] epc : fdt_check_header+0x0/0x1fc
[    0.000000]  ra : early_init_dt_verify+0x16/0x6e
[    0.000000] epc : ffffffe00049c04a ra : ffffffe000a26144 sp : ffffffe001603f10
[    0.000000]  gp : ffffffe0017d04b0 tp : ffffffe001611280 t0 : ffffffffffffffff
[    0.000000]  t1 : 0000000012adc51a t2 : 000000000004ffeb s0 : ffffffe001603f30
[    0.000000]  s1 : 0000000040000000 a0 : 0000000040000000 a1 : ffffffe001617ae8
[    0.000000]  a2 : 0000000000000000 a3 : 0000000000000001 a4 : 0000000000000018
[    0.000000]  a5 : ffffffe000c0f8f0 a6 : ffffffe01fdfee70 a7 : 0000000000000000
[    0.000000]  s2 : 0000000080000200 s3 : 0000000000000fff s4 : ffffffe000c0ec60
[    0.000000]  s5 : 0000000000000006 s6 : 00000000000001c0 s7 : ffffffe01fdfee40
[    0.000000]  s8 : 0000000081000200 s9 : 0000000080000200 s10: ffffffe000c01000
[    0.000000]  s11: 0000000000000fff t3 : 000000000000000e t4 : ffffffffa6000000
[    0.000000]  t5 : ffffffffffffffff t6 : 0000000000000015
[    0.000000] status: 0000000000000100 badaddr: 0000000040000001 cause: 000000000000000d
[    0.000000] Call Trace:
[    0.000000] [<ffffffe00049c04a>] fdt_check_header+0x0/0x1fc
[    0.000000] [<ffffffe000a02c84>] setup_arch+0x3a8/0x414
[    0.000000] [<ffffffe000a006fa>] start_kernel+0x8e/0x62c
[    0.000000] random: get_random_bytes called from print_oops_end_marker+0x22/0x44 with crng_init=0
[    0.000000] ---[ end trace 0000000000000000 ]---
[    0.000000] Kernel panic - not syncing: Attempted to kill the idle task!
[    0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---

This is with riscv:defconfig. Reverting this patch fixes the problem.

Bisect log is attached.

Guenter

---
# bad: [f00397ee41c79b6155b9b44abd0055b2c0621349] Add linux-next specific files for 20210319
# good: [1e28eed17697bcf343c6743f0028cc3b5dd88bf0] Linux 5.12-rc3
git bisect start 'HEAD' 'v5.12-rc3'
# bad: [728bc19f9c531acd94e4139e8258a1577f17d2ff] Merge remote-tracking branch 'drm/drm-next'
git bisect bad 728bc19f9c531acd94e4139e8258a1577f17d2ff
# bad: [ad5d10f254a7d91a9fadadcf2b109795544e9dcb] Merge remote-tracking branch 'hid/for-next'
git bisect bad ad5d10f254a7d91a9fadadcf2b109795544e9dcb
# good: [163518c802260a16b5bca8bd7fe0a9335a6860e1] Merge remote-tracking branch 'qcom/for-next'
git bisect good 163518c802260a16b5bca8bd7fe0a9335a6860e1
# bad: [a9fdd30a39510f783a38fe5c30b2d888397b35d5] Merge remote-tracking branch 'btrfs/for-next'
git bisect bad a9fdd30a39510f783a38fe5c30b2d888397b35d5
# good: [3f26d646c9c30116057e2cc34091e7d3fd894863] Merge remote-tracking branch 'microblaze/next'
git bisect good 3f26d646c9c30116057e2cc34091e7d3fd894863
# good: [f0fd694b8c3eba5651fa9eed185cc1c39c1a3d64] Merge branch 'ext/qu/subpage-write-meta-v2' into for-next-next-v5.12-20210317
git bisect good f0fd694b8c3eba5651fa9eed185cc1c39c1a3d64
# bad: [762f6038cff9e5658c29936a0ff0398fb2b77dc9] Merge remote-tracking branch 'sh/for-next'
git bisect bad 762f6038cff9e5658c29936a0ff0398fb2b77dc9
# good: [fb009cbdd0693bd633f11e99526617b3d392cfad] firmware: bcm47xx_nvram: rename finding function and its variables
git bisect good fb009cbdd0693bd633f11e99526617b3d392cfad
# good: [10b3a0a8f783dc5491921f0236f1b756cbe1b12d] Merge remote-tracking branch 'parisc-hd/for-next'
git bisect good 10b3a0a8f783dc5491921f0236f1b756cbe1b12d
# good: [2882b7626f4903a8e9250b328cdf7396a6deecac] sh: kernel: traps: remove unused variable
git bisect good 2882b7626f4903a8e9250b328cdf7396a6deecac
# bad: [06c7c914de26c5a4f1418fd54e4dfd0be4215de6] RISC-V: enable XIP
git bisect bad 06c7c914de26c5a4f1418fd54e4dfd0be4215de6
# good: [9530141455c968938a913d602a236c2a7b0322e1] riscv: Add ARCH_HAS_FORTIFY_SOURCE
git bisect good 9530141455c968938a913d602a236c2a7b0322e1
# good: [2f100585d04506004b8027ec9bbaee26940a769f] riscv: Enable generic clockevent broadcast
git bisect good 2f100585d04506004b8027ec9bbaee26940a769f
# first bad commit: [06c7c914de26c5a4f1418fd54e4dfd0be4215de6] RISC-V: enable XIP