linux-kernel - [PATCH 00/16] clk: st: embed clock outputs within drivers

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Message-Id: <20210321204038.14417-1-avolmat@me.com>
Date:   Sun, 21 Mar 2021 21:40:22 +0100
From:   Alain Volmat <avolmat@...com>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Patrice Chotard <patrice.chotard@...com>
Cc:     Lee Jones <lee.jones@...aro.org>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, Alain Volmat <avolmat@...com>
Subject: [PATCH 00/16] clk: st: embed clock outputs within drivers

Most of ST clock drivers used by STi platform are updated in
order to introduce clock outputs informations within each drivers
and thus allow to avoid having to rely on clock-output-names properties
within DT clock nodes.
For that purpose, drivers are updated to allow handling both modes
(with or without clock-output-names).
Once all DT will have been updated, the legacy mode could be removed
from the drivers.
This will also allow, once all STi DT will be corrected, to remove the
of_clk_detect_critical API from clk core code since STi clock drivers
are the only drivers using this API.

This serie also contains modifications within STi DTS in order to use
the newly introduced compatible and remove clock-output-names
properties.

Alain Volmat (16):
  clk: st: clkgen-pll: remove used variable of struct clkgen_pll
  clk: st: flexgen: embed soc clock outputs within compatible data
  dt-bindings: clock: st: flexgen: add new introduced compatible
  clk: st: clkgen-pll: embed soc clock outputs within compatible data
  dt-bindings: clock: st: clkgen-pll: add new introduced compatible
  clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
  dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible
  ARM: dts: sti: update flexgen compatible within stih418-clock
  ARM: dts: sti: update flexgen compatible within stih407-clock
  ARM: dts: sti: update flexgen compatible within stih410-clock
  ARM: dts: sti: update clkgen-pll entries in stih407-clock
  ARM: dts: sti: update clkgen-pll entries in stih410-clock
  ARM: dts: sti: update clkgen-pll entries in stih418-clock
  ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
  ARM: dts: sti: update clkgen-fsyn entries in stih410-clock
  ARM: dts: sti: update clkgen-fsyn entries in stih418-clock

 .../bindings/clock/st/st,clkgen-pll.txt       |   3 +
 .../bindings/clock/st/st,flexgen.txt          |  10 +
 .../bindings/clock/st/st,quadfs.txt           |   3 +
 arch/arm/boot/dts/stih407-clock.dtsi          | 128 +------
 arch/arm/boot/dts/stih410-clock.dtsi          | 138 +------
 arch/arm/boot/dts/stih418-clock.dtsi          | 136 +------
 drivers/clk/st/clk-flexgen.c                  | 344 +++++++++++++++++-
 drivers/clk/st/clkgen-fsyn.c                  | 113 +++++-
 drivers/clk/st/clkgen-pll.c                   | 121 +++++-
 9 files changed, 588 insertions(+), 408 deletions(-)

-- 
2.17.1