linux-kernel - RE: Re: [PATCH 1/3] dt-bindings: imx6q-pcie: specify the imx8mq pcie phy voltage

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <VI1PR04MB585364FC420972C538281F2B8C659@VI1PR04MB5853.eurprd04.prod.outlook.com>
Date:   Mon, 22 Mar 2021 09:06:30 +0000
From:   Richard Zhu <hongxing.zhu@....com>
To:     Lucas Stach <l.stach@...gutronix.de>,
        "andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "kw@...ux.com" <kw@...ux.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "stefan@...er.ch" <stefan@...er.ch>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        dl-linux-imx <linux-imx@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>
Subject: RE: Re: [PATCH 1/3] dt-bindings: imx6q-pcie: specify the imx8mq pcie
 phy voltage


> -----Original Message-----
> From: Lucas Stach <l.stach@...gutronix.de>
> Sent: Friday, March 19, 2021 5:49 PM
> To: Richard Zhu <hongxing.zhu@....com>; andrew.smirnov@...il.com;
> shawnguo@...nel.org; kw@...ux.com; bhelgaas@...gle.com;
> stefan@...er.ch; lorenzo.pieralisi@....com
> Cc: linux-pci@...r.kernel.org; dl-linux-imx <linux-imx@....com>;
> linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> kernel@...gutronix.de
> Subject: [EXT] Re: [PATCH 1/3] dt-bindings: imx6q-pcie: specify the imx8mq
> pcie phy voltage
> Am Freitag, dem 19.03.2021 um 16:24 +0800 schrieb Richard Zhu:
> > Both 1.8v and 3.3v power supplies can be feeded to i.MX8MQ PCIe PHY.
> > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> > the VREG_BYPASS bits of GPR registers should be cleared from default
> > value 1b'1 to 1b'0.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > ---
> >  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > index de4b2baf91e8..23efbad9e804 100644
> > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > @@ -59,6 +59,10 @@ Additional required properties for imx7d-pcie and
> imx8mq-pcie:
> >  Additional required properties for imx8mq-pcie:
> >  - clock-names: Must include the following additional entries:
> >       - "pcie_aux"
> > +- pcie-vph-3v3: If present then PCIE_VPH is feeded by 3.3v in the HW
> > +  schematic design. The PCIE_VPH is suggested to be 1.8v refer to the
> > +  data sheet. If the PCIE_VPH is supplied by 3.3V, the VREG_BYPASS
> > +  should be cleared to zero accordingly.
> 
> Uhm, no. Please don't add boolean DT properties for random parts of the
> board design.
> 
> If we need to know the voltage of PCIE_VPH, we should really add the VPH
> regulator as a supply to the PCIe controller node, then work out the voltage
> the usual way by using the Linux regulator API.
> 
[Richard Zhu] Hi Lucas:
Thanks for your comments. Since the vgen5_reg is used to power up PCIe PHY on i.MX8MQ EVK board,
 and it's set to be "regulator-always-on;".
Did only the regulator_get_voltage or combined with regulator_enable/regulator_disable can be used in the driver?

Best Regards
Richard Zhu

> Regards,
> Lucas