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Message-Id: <1616513066-62025-1-git-send-email-zhouyanjie@wanyeetech.com>
Date: Tue, 23 Mar 2021 23:24:26 +0800
From: 周琰杰 (Zhou Yanjie)
<zhouyanjie@...yeetech.com>
To: hminas@...opsys.com, gregkh@...uxfoundation.org,
paul@...pouillou.net
Cc: linux-mips@...r.kernel.org, linux-usb@...r.kernel.org,
linux-kernel@...r.kernel.org, dongsheng.qiu@...enic.com,
aric.pzqi@...enic.com, sernia.zhou@...mail.com,
Dragan Čečavac <dragancecavac@...oo.com>
Subject: [PATCH] USB: DWC2: Add VBUS overcurrent detection control.
Introduce configurable option for enabling GOTGCTL register
bits VbvalidOvEn and VbvalidOvVal. Once selected it disables
VBUS overcurrent detection.
This patch is derived from Dragan Čečavac (in the kernel 3.18
tree of CI20). It is very useful for the MIPS Creator CI20(r1).
Without this patch, CI20's OTG port has a great probability to
face overcurrent warning, which breaks the OTG functionality.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@...yeetech.com>
Signed-off-by: Dragan Čečavac <dragancecavac@...oo.com>
---
drivers/usb/dwc2/Kconfig | 6 ++++++
drivers/usb/dwc2/core.c | 9 +++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/usb/dwc2/Kconfig b/drivers/usb/dwc2/Kconfig
index c131719..e40d187 100644
--- a/drivers/usb/dwc2/Kconfig
+++ b/drivers/usb/dwc2/Kconfig
@@ -94,4 +94,10 @@ config USB_DWC2_DEBUG_PERIODIC
non-periodic transfers, but of course the debug logs will be
incomplete. Note that this also disables some debug messages
for which the transfer type cannot be deduced.
+
+config USB_DWC2_DISABLE_VOD
+ bool "Disable VBUS overcurrent detection"
+ help
+ Say Y here to switch off VBUS overcurrent detection. It enables USB
+ functionality blocked by overcurrent detection.
endif
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index fec17a2..c629dc97 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -1200,6 +1200,7 @@ static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
{
u32 usbcfg;
+ u32 otgctl;
int retval = 0;
if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
@@ -1231,6 +1232,14 @@ int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
dwc2_writel(hsotg, usbcfg, GUSBCFG);
}
+ if (IS_ENABLED(CONFIG_USB_DWC2_DISABLE_VOD)) {
+ if (dwc2_is_host_mode(hsotg)) {
+ otgctl = readl(hsotg->regs + GOTGCTL);
+ otgctl |= GOTGCTL_VBVALOEN | GOTGCTL_VBVALOVAL;
+ writel(otgctl, hsotg->regs + GOTGCTL);
+ }
+ }
+
return retval;
}
--
2.7.4
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