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Message-Id: <20210323210446.24867-1-digetx@gmail.com>
Date: Wed, 24 Mar 2021 00:04:45 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc: linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org
Subject: [PATCH v1 1/2] memory: tegra20: Correct comment to MC_STAT registers writes
The code was changed multiple times and the comment to MC_STAT
registers writes became slightly outdated. The MC_STAT programming
now isn't hardcoded to the "bandwidth" mode, let's clarify this in
the comment.
Signed-off-by: Dmitry Osipenko <digetx@...il.com>
---
drivers/memory/tegra/tegra20.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/memory/tegra/tegra20.c b/drivers/memory/tegra/tegra20.c
index 14caf5b9324c..4659c0cea30d 100644
--- a/drivers/memory/tegra/tegra20.c
+++ b/drivers/memory/tegra/tegra20.c
@@ -451,9 +451,8 @@ static void tegra20_mc_stat_gather(struct tegra20_mc_stat *stat)
control_1 = tegra20_mc_stat_gather_control(&stat->gather1);
/*
- * Reset statistic gathers state, select bandwidth mode for the
- * statistics collection mode and set clocks counter saturation
- * limit to maximum.
+ * Reset statistic gathers state, select statistics collection mode
+ * and set clocks counter saturation limit to maximum.
*/
mc_writel(mc, 0x00000000, MC_STAT_CONTROL);
mc_writel(mc, control_0, MC_STAT_EMC_CONTROL_0);
--
2.30.2
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