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Message-ID: <20210323231321.GF2710221@ziepe.ca>
Date:   Tue, 23 Mar 2021 20:13:21 -0300
From:   Jason Gunthorpe <jgg@...pe.ca>
To:     Aruna Ramakrishna <aruna.ramakrishna@...cle.com>
Cc:     Praveen Kumar Kannoju <praveen.kannoju@...cle.com>,
        leon@...nel.org, dledford@...hat.com, linux-rdma@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Rajesh Sivaramasubramaniom 
        <rajesh.sivaramasubramaniom@...cle.com>,
        Rama Nichanamatlu <rama.nichanamatlu@...cle.com>,
        Jeffery Yoder <jeffery.yoder@...cle.com>
Subject: Re: [PATCH v2] IB/mlx5: Reduce max order of memory allocated for xlt
 update

On Tue, Mar 23, 2021 at 12:41:51PM -0700, Aruna Ramakrishna wrote:
>    There is a far greater possibility of an order-8 allocation failing,
>    esp. with the addition of __GFP_NORETRY , and the code would have to
>    fall back to a lower order allocation more often than not (esp. on a
>    long running system). Unless the performance gains from using order-8
>    pages is significant (and it does not seem that way to me), we can just
>    skip this step and directly go to the lower order allocation.

Do not send HTML mails.

Do you have benchmarks that show the performance of the high order
pages is not relavent? I'm a bit surprised to hear that

This code really needs some attention to use a proper
scatter/gather. I understand the chip can do it, just some of the
software layers need to be stripped away so it can form the right SGL
in the HW.

Jason

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