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Message-Id: <20210323120647.454211-19-suzuki.poulose@arm.com>
Date: Tue, 23 Mar 2021 12:06:46 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org, coresight@...ts.linaro.org,
mathieu.poirier@...aro.org, mike.leach@...aro.org,
leo.yan@...aro.org, anshuman.khandual@....com, maz@...nel.org,
catalin.marinas@....com, Jonathan Corbet <corbet@....net>,
linux-doc@...r.kernel.org,
Suzuki K Poulose <suzuki.poulose@....com>
Subject: [PATCH v5 18/19] Documentation: trace: Add documentation for TRBE
From: Anshuman Khandual <anshuman.khandual@....com>
Add documentation for the TRBE under trace/coresight.
Cc: Jonathan Corbet <corbet@....net>
Cc: linux-doc@...r.kernel.org
Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
[ Split from the TRBE driver patch ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
---
.../trace/coresight/coresight-trbe.rst | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/trace/coresight/coresight-trbe.rst
diff --git a/Documentation/trace/coresight/coresight-trbe.rst b/Documentation/trace/coresight/coresight-trbe.rst
new file mode 100644
index 000000000000..b9928ef148da
--- /dev/null
+++ b/Documentation/trace/coresight/coresight-trbe.rst
@@ -0,0 +1,38 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+==============================
+Trace Buffer Extension (TRBE).
+==============================
+
+ :Author: Anshuman Khandual <anshuman.khandual@....com>
+ :Date: November 2020
+
+Hardware Description
+--------------------
+
+Trace Buffer Extension (TRBE) is a percpu hardware which captures in system
+memory, CPU traces generated from a corresponding percpu tracing unit. This
+gets plugged in as a coresight sink device because the corresponding trace
+generators (ETE), are plugged in as source device.
+
+The TRBE is not compliant to CoreSight architecture specifications, but is
+driven via the CoreSight driver framework to support the ETE (which is
+CoreSight compliant) integration.
+
+Sysfs files and directories
+---------------------------
+
+The TRBE devices appear on the existing coresight bus alongside the other
+coresight devices::
+
+ >$ ls /sys/bus/coresight/devices
+ trbe0 trbe1 trbe2 trbe3
+
+The ``trbe<N>`` named TRBEs are associated with a CPU.::
+
+ >$ ls /sys/bus/coresight/devices/trbe0/
+ align flag
+
+*Key file items are:-*
+ * ``align``: TRBE write pointer alignment
+ * ``flag``: TRBE updates memory with access and dirty flags
--
2.24.1
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