lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 24 Mar 2021 17:03:23 +0000
From:   Will Deacon <will@...nel.org>
To:     Mark Rutland <mark.rutland@....com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        catalin.marinas@....com, james.morse@....com, marcan@...can.st,
        maz@...nel.org, tglx@...utronix.de
Subject: Re: [PATCHv3 6/6] arm64: irq: allow FIQs to be handled

On Mon, Mar 15, 2021 at 11:56:29AM +0000, Mark Rutland wrote:
> On contemporary platforms we don't use FIQ, and treat any stray FIQ as a
> fatal event. However, some platforms have an interrupt controller wired
> to FIQ, and need to handle FIQ as part of regular operation.
> 
> So that we can support both cases dynamically, this patch updates the
> FIQ exception handling code to operate the same way as the IRQ handling
> code, with its own handle_arch_fiq handler. Where a root FIQ handler is
> not registered, an unexpected FIQ exception will trigger the default FIQ
> handler, which will panic() as today. Where a root FIQ handler is
> registered, handling of the FIQ is deferred to that handler.
> 
> As el0_fiq_invalid_compat is supplanted by el0_fiq, the former is
> removed. For !CONFIG_COMPAT builds we never expect to take an exception
> from AArch32 EL0, so we keep the common el0_fiq_invalid handler.
> 
> Signed-off-by: Mark Rutland <mark.rutland@....com>
> Tested-by: Hector Martin <marcan@...can.st>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: James Morse <james.morse@....com>
> Cc: Marc Zyngier <maz@...nel.org>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Will Deacon <will@...nel.org>
> ---
>  arch/arm64/include/asm/irq.h |  1 +
>  arch/arm64/kernel/entry.S    | 30 +++++++++++++++++++++---------
>  arch/arm64/kernel/irq.c      | 16 ++++++++++++++++
>  3 files changed, 38 insertions(+), 9 deletions(-)

Acked-by: Will Deacon <will@...nel.org>

Will

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ