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Message-Id: <20210324081923.20379-13-noltari@gmail.com>
Date: Wed, 24 Mar 2021 09:19:13 +0100
From: Álvaro Fernández Rojas
<noltari@...il.com>
To: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Lee Jones <lee.jones@...aro.org>,
Michael Walle <michael@...le.cc>,
Florian Fainelli <f.fainelli@...il.com>,
bcm-kernel-feedback-list@...adcom.com,
Jonas Gorski <jonas.gorski@...il.com>,
Álvaro Fernández Rojas
<noltari@...il.com>,
Necip Fazil Yildiran <fazilyildiran@...il.com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: Rob Herring <robh@...nel.org>
Subject: [PATCH v9 12/22] dt-bindings: add BCM6362 GPIO sysctl binding documentation
Add binding documentation for the GPIO sysctl found in BCM6362 SoCs.
Signed-off-by: Álvaro Fernández Rojas <noltari@...il.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
v9: no changes
v8: add changes suggested by Rob Herring
v7: add changes suggested by Rob Herring
.../mfd/brcm,bcm6362-gpio-sysctl.yaml | 236 ++++++++++++++++++
1 file changed, 236 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
new file mode 100644
index 000000000000..48d14a5fe0d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
@@ -0,0 +1,236 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6362 GPIO System Controller Device Tree Bindings
+
+maintainers:
+ - Álvaro Fernández Rojas <noltari@...il.com>
+ - Jonas Gorski <jonas.gorski@...il.com>
+
+description:
+ Broadcom BCM6362 SoC GPIO system controller which provides a register map
+ for controlling the GPIO and pins of the SoC.
+
+properties:
+ "#address-cells": true
+
+ "#size-cells": true
+
+ compatible:
+ items:
+ - const: brcm,bcm6362-gpio-sysctl
+ - const: syscon
+ - const: simple-mfd
+
+ ranges:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+patternProperties:
+ "^gpio@[0-9a-f]+$":
+ # Child node
+ type: object
+ $ref: "../gpio/brcm,bcm6345-gpio.yaml"
+ description:
+ GPIO controller for the SoC GPIOs. This child node definition
+ should follow the bindings specified in
+ Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
+
+ "^pinctrl@[0-9a-f]+$":
+ # Child node
+ type: object
+ $ref: "../pinctrl/brcm,bcm6362-pinctrl.yaml"
+ description:
+ Pin controller for the SoC pins. This child node definition
+ should follow the bindings specified in
+ Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml.
+
+required:
+ - "#address-cells"
+ - compatible
+ - ranges
+ - reg
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@...00080 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6362-gpio-sysctl", "syscon", "simple-mfd";
+ reg = <0x10000080 0x80>;
+ ranges = <0 0x10000080 0x80>;
+
+ gpio@0 {
+ compatible = "brcm,bcm6362-gpio";
+ reg-names = "dirout", "dat";
+ reg = <0x0 0x8>, <0x8 0x8>;
+
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 48>;
+ #gpio-cells = <2>;
+ };
+
+ pinctrl: pinctrl@18 {
+ compatible = "brcm,bcm6362-pinctrl";
+ reg = <0x18 0x10>, <0x38 0x4>;
+
+ pinctrl_usb_device_led: usb_device_led-pins {
+ function = "usb_device_led";
+ pins = "gpio0";
+ };
+
+ pinctrl_sys_irq: sys_irq-pins {
+ function = "sys_irq";
+ pins = "gpio1";
+ };
+
+ pinctrl_serial_led: serial_led-pins {
+ pinctrl_serial_led_clk: serial_led_clk-pins {
+ function = "serial_led_clk";
+ pins = "gpio2";
+ };
+
+ pinctrl_serial_led_data: serial_led_data-pins {
+ function = "serial_led_data";
+ pins = "gpio3";
+ };
+ };
+
+ pinctrl_robosw_led_data: robosw_led_data-pins {
+ function = "robosw_led_data";
+ pins = "gpio4";
+ };
+
+ pinctrl_robosw_led_clk: robosw_led_clk-pins {
+ function = "robosw_led_clk";
+ pins = "gpio5";
+ };
+
+ pinctrl_robosw_led0: robosw_led0-pins {
+ function = "robosw_led0";
+ pins = "gpio6";
+ };
+
+ pinctrl_robosw_led1: robosw_led1-pins {
+ function = "robosw_led1";
+ pins = "gpio7";
+ };
+
+ pinctrl_inet_led: inet_led-pins {
+ function = "inet_led";
+ pins = "gpio8";
+ };
+
+ pinctrl_spi_cs2: spi_cs2-pins {
+ function = "spi_cs2";
+ pins = "gpio9";
+ };
+
+ pinctrl_spi_cs3: spi_cs3-pins {
+ function = "spi_cs3";
+ pins = "gpio10";
+ };
+
+ pinctrl_ntr_pulse: ntr_pulse-pins {
+ function = "ntr_pulse";
+ pins = "gpio11";
+ };
+
+ pinctrl_uart1_scts: uart1_scts-pins {
+ function = "uart1_scts";
+ pins = "gpio12";
+ };
+
+ pinctrl_uart1_srts: uart1_srts-pins {
+ function = "uart1_srts";
+ pins = "gpio13";
+ };
+
+ pinctrl_uart1: uart1-pins {
+ pinctrl_uart1_sdin: uart1_sdin-pins {
+ function = "uart1_sdin";
+ pins = "gpio14";
+ };
+
+ pinctrl_uart1_sdout: uart1_sdout-pins {
+ function = "uart1_sdout";
+ pins = "gpio15";
+ };
+ };
+
+ pinctrl_adsl_spi: adsl_spi-pins {
+ pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
+ function = "adsl_spi_miso";
+ pins = "gpio16";
+ };
+
+ pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
+ function = "adsl_spi_mosi";
+ pins = "gpio17";
+ };
+
+ pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
+ function = "adsl_spi_clk";
+ pins = "gpio18";
+ };
+
+ pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
+ function = "adsl_spi_cs";
+ pins = "gpio19";
+ };
+ };
+
+ pinctrl_ephy0_led: ephy0_led-pins {
+ function = "ephy0_led";
+ pins = "gpio20";
+ };
+
+ pinctrl_ephy1_led: ephy1_led-pins {
+ function = "ephy1_led";
+ pins = "gpio21";
+ };
+
+ pinctrl_ephy2_led: ephy2_led-pins {
+ function = "ephy2_led";
+ pins = "gpio22";
+ };
+
+ pinctrl_ephy3_led: ephy3_led-pins {
+ function = "ephy3_led";
+ pins = "gpio23";
+ };
+
+ pinctrl_ext_irq0: ext_irq0-pins {
+ function = "ext_irq0";
+ pins = "gpio24";
+ };
+
+ pinctrl_ext_irq1: ext_irq1-pins {
+ function = "ext_irq1";
+ pins = "gpio25";
+ };
+
+ pinctrl_ext_irq2: ext_irq2-pins {
+ function = "ext_irq2";
+ pins = "gpio26";
+ };
+
+ pinctrl_ext_irq3: ext_irq3-pins {
+ function = "ext_irq3";
+ pins = "gpio27";
+ };
+
+ pinctrl_nand: nand-pins {
+ function = "nand";
+ group = "nand_grp";
+ };
+ };
+ };
--
2.20.1
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