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Message-ID: <2BAC42AE-6BD3-45EF-8867-1A15F25FE80B@gmail.com>
Date: Thu, 25 Mar 2021 13:42:23 -0300
From: Arnaldo <arnaldo.melo@...il.com>
To: Peter Zijlstra <peterz@...radead.org>,
Arnaldo Carvalho de Melo <acme@...nel.org>
CC: Madhavan Srinivasan <maddy@...ux.ibm.com>,
Athira Rajeev <atrajeev@...ux.vnet.ibm.com>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, mpe@...erman.id.au,
jolsa@...nel.org, ravi.bangoria@...ux.ibm.com, kjain@...ux.ibm.com,
kan.liang@...ux.intel.com
Subject: Re: [PATCH V2 1/5] powerpc/perf: Expose processor pipeline stage cycles using PERF_SAMPLE_WEIGHT_STRUCT
On March 25, 2021 11:38:01 AM GMT-03:00, Peter Zijlstra <peterz@...radead.org> wrote:
>On Thu, Mar 25, 2021 at 10:01:35AM -0300, Arnaldo Carvalho de Melo
>wrote:.
>> > > Also for CPU_FTR_ARCH_31, capture the two cycle counter
>information in
>> > > two 16 bit fields of perf_sample_weight structure.
>> >
>> > Changes looks fine to me.
>> >
>> > Reviewed-by: Madhavan Srinivasan <maddy@...ux.ibm.com>
>>
>> So who will process the kernel bits? I'm merging the tooling parts,
>
>I was sorta expecting these to go through the powerpc tree. Let me know
>if you want them in tip/perf/core instead.
Shouldn't matter by which tree it gets upstream, as long as it gets picked :-)
- Arnaldo
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