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Message-Id: <161669343969.1653955.1039033291680251791.b4-ty@kernel.org>
Date: Thu, 25 Mar 2021 18:09:27 +0000
From: Will Deacon <will@...nel.org>
To: Joerg Roedel <joro@...tes.org>,
Zhen Lei <thunder.leizhen@...wei.com>,
iommu <iommu@...ts.linux-foundation.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Robin Murphy <robin.murphy@....com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Cc: catalin.marinas@....com, kernel-team@...roid.com,
Will Deacon <will@...nel.org>, Rui Zhu <zhurui3@...wei.com>
Subject: Re: [PATCH 1/1] iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK
On Wed, 24 Mar 2021 16:16:03 +0800, Zhen Lei wrote:
> In arm_smmu_gerror_handler(), the value of the SMMU_GERROR register is
> filtered by GERROR_ERR_MASK. However, the GERROR_ERR_MASK does not contain
> the SFM bit. As a result, the subsequent error processing is not performed
> when only the SFM error occurs.
Applied to will (for-joerg/arm-smmu/updates), thanks!
[1/1] iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK
https://git.kernel.org/will/c/655c447c97d7
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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