linux-kernel - Re: [PATCH v1 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20210326001120.GA2001669@robh.at.kernel.org>
Date:   Thu, 25 Mar 2021 18:11:20 -0600
From:   Rob Herring <robh@...nel.org>
To:     Taniya Das <tdas@...eaurora.org>
Cc:     Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette   
        <mturquette@...libre.com>, Rajendra Nayak <rnayak@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v1 1/6] dt-bindings: clock: Add SC7280 DISPCC clock
 binding

On Wed, Mar 17, 2021 at 06:52:17AM +0530, Taniya Das wrote:
> Add device tree bindings for display clock controller subsystem for
> Qualcomm Technology Inc's SC7280 SoCs.
> 
> Signed-off-by: Taniya Das <tdas@...eaurora.org>
> ---
>  .../bindings/clock/qcom,sc7280-dispcc.yaml         | 94 ++++++++++++++++++++++
>  include/dt-bindings/clock/qcom,dispcc-sc7280.h     | 55 +++++++++++++
>  2 files changed, 149 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
> new file mode 100644
> index 0000000..2178666
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Display Clock & Reset Controller Binding for SC7280
> +
> +maintainers:
> +  - Taniya Das <tdas@...eaurora.org>
> +
> +description: |
> +  Qualcomm display clock control module which supports the clocks, resets and
> +  power domains on SC7280.
> +
> +  See also dt-bindings/clock/qcom,dispcc-sc7280.h.
> +
> +properties:
> +  compatible:
> +    const: qcom,sc7280-dispcc
> +
> +  clocks:
> +    items:
> +      - description: Board XO source
> +      - description: GPLL0 source from GCC
> +      - description: Byte clock from DSI PHY
> +      - description: Pixel clock from DSI PHY
> +      - description: Link clock from DP PHY
> +      - description: VCO DIV clock from DP PHY
> +      - description: Link clock from EDP PHY
> +      - description: VCO DIV clock from EDP PHY
> +
> +  clock-names:
> +    items:
> +      - const: bi_tcxo
> +      - const: gcc_disp_gpll0_clk
> +      - const: dsi0_phy_pll_out_byteclk
> +      - const: dsi0_phy_pll_out_dsiclk
> +      - const: dp_phy_pll_link_clk
> +      - const: dp_phy_pll_vco_div_clk
> +      - const: edp_phy_pll_link_clk
> +      - const: edp_phy_pll_vco_div_clk
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  '#power-domain-cells':
> +    const: 1
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - '#clock-cells'
> +  - '#reset-cells'
> +  - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
> +    #include <dt-bindings/clock/qcom,rpmh.h>
> +    clock-controller@...0000 {
> +      compatible = "qcom,sc7280-dispcc";
> +      reg = <0x0af00000 0x200000>;
> +      clocks = <&rpmhcc RPMH_CXO_CLK>,
> +               <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> +               <&dsi_phy 0>,
> +               <&dsi_phy 1>,
> +               <&dp_phy 0>,
> +               <&dp_phy 1>,
> +               <&edp_phy 0>,
> +               <&edp_phy 1>;
> +      clock-names = "bi_tcxo",
> +                    "gcc_disp_gpll0_clk",
> +                    "dsi0_phy_pll_out_byteclk",
> +                    "dsi0_phy_pll_out_dsiclk",
> +                    "dp_phy_pll_link_clk",
> +                    "dp_phy_pll_vco_div_clk",
> +                    "edp_phy_pll_link_clk",
> +                    "edp_phy_pll_vco_div_clk";
> +      #clock-cells = <1>;
> +      #reset-cells = <1>;
> +      #power-domain-cells = <1>;
> +    };
> +...
> diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h
> new file mode 100644
> index 0000000..2074b30
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h
> @@ -0,0 +1,55 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */

Dual license?

Rob