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Message-ID: <87wntufchl.wl-maz@kernel.org>
Date:   Fri, 26 Mar 2021 10:14:30 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Megha Dey <megha.dey@...el.com>, linux-kernel@...r.kernel.org,
        dave.jiang@...el.com, ashok.raj@...el.com, kevin.tian@...el.com,
        dwmw@...zon.co.uk, x86@...nel.org, tony.luck@...el.com,
        dan.j.williams@...el.com, jgg@...lanox.com, kvm@...r.kernel.org,
        iommu@...ts.linux-foundation.org, alex.williamson@...hat.com,
        bhelgaas@...gle.com, linux-pci@...r.kernel.org,
        baolu.lu@...ux.intel.com, ravi.v.shankar@...el.com
Subject: Re: [Patch V2 07/13] irqdomain/msi: Provide msi_alloc/free_store() callbacks

On Thu, 25 Mar 2021 18:44:48 +0000,
Thomas Gleixner <tglx@...utronix.de> wrote:
> 
> On Thu, Mar 25 2021 at 17:08, Marc Zyngier wrote:
> > Megha Dey <megha.dey@...el.com> wrote:
> >> @@ -434,6 +434,12 @@ int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
> >>  	if (ret)
> >>  		return ret;
> >>  
> >> +	if (ops->msi_alloc_store) {
> >> +		ret = ops->msi_alloc_store(domain, dev, nvec);
> >
> > What is supposed to happen if we get aliasing devices (similar to what
> > we have with devices behind a PCI bridge)?
> >
> > The ITS code goes through all kind of hoops to try and detect this
> > case when sizing the translation tables (in the .prepare callback),
> > and I have the feeling that sizing the message store is analogous.
> 
> No. The message store itself is sized upfront by the underlying 'master'
> device. Each 'master' device has it's own irqdomain.
> 
> This is the allocation for the subdevice and this is not part of PCI and
> therefore not subject to PCI aliasing.

Fair enough. If we are guaranteed that there is no aliasing, then this
point is moot.

	M.

-- 
Without deviation from the norm, progress is not possible.

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