linux-kernel - Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <986ee841d0c512a6f0ffe9dfa2e0803980b02aa0.camel@collabora.com>
Date:   Fri, 26 Mar 2021 12:28:25 -0300
From:   Ezequiel Garcia <ezequiel@...labora.com>
To:     Benjamin Gaignard <benjamin.gaignard@...labora.com>,
        Philipp Zabel <pza@...gutronix.de>
Cc:     mchehab@...nel.org, robh+dt@...nel.org, shawnguo@...nel.org,
        s.hauer@...gutronix.de, festevam@...il.com, lee.jones@...aro.org,
        gregkh@...uxfoundation.org, mripard@...nel.org,
        paul.kocialkowski@...tlin.com, wens@...e.org,
        jernej.skrabec@...l.net, hverkuil-cisco@...all.nl,
        emil.l.velikov@...il.com, kernel@...gutronix.de, linux-imx@....com,
        linux-media@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devel@...verdev.osuosl.org,
        kernel@...labora.com
Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware

On Fri, 2021-03-26 at 15:33 +0100, Benjamin Gaignard wrote:
> 
> Le 26/03/2021 à 15:24, Philipp Zabel a écrit :
> > On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote:
> > > Split VPU node in two: one for G1 and one for G2 since they are
> > > different hardware blocks.
> > > Add syscon for hardware control block.
> > > Remove reg-names property that is useless.
> > > Each VPU node only need one interrupt.
> > > 
> > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...labora.com>
> > > ---
> > > version 5:
> > >   - use syscon instead of VPU reset
> > > 
> > >   arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++-----
> > >   1 file changed, 34 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > index 17c449e12c2e..b537d153ebbd 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@...f0040 {
> > >                         status = "disabled";
> > >                 };
> > >   
> > > -               vpu: video-codec@...00000 {
> > > +               vpu_ctrl: syscon@...20000 {
> > > +                       compatible = "nxp,imx8mq-vpu-ctrl", "syscon";
> > > +                       reg = <0x38320000 0x10000>;
> > > +               };
> > > +
> > > +               vpu_g1: video-codec@...00000 {
> > >                         compatible = "nxp,imx8mq-vpu";
> > > -                       reg = <0x38300000 0x10000>,
> > > -                             <0x38310000 0x10000>,
> > > -                             <0x38320000 0x10000>;
> > > -                       reg-names = "g1", "g2", "ctrl";
> > > -                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> > > -                                    <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > -                       interrupt-names = "g1", "g2";
> > > +                       reg = <0x38300000 0x10000>;
> > > +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g1";
> > >                         clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > @@ -1350,9 +1351,33 @@ vpu: video-codec@...00000 {
> > >                                                  <&clk IMX8MQ_VPU_PLL_OUT>,
> > >                                                  <&clk IMX8MQ_SYS1_PLL_800M>,
> > >                                                  <&clk IMX8MQ_VPU_PLL>;
> > > -                       assigned-clock-rates = <600000000>, <600000000>,
> > > +                       assigned-clock-rates = <600000000>, <300000000>,
> > I'd like to see this mentioned in the commit message.
> 
> Yes I would do that.
> The value comes from the datasheet.
> 
> > 
> > > +                                              <800000000>, <0>;
> > > +                       power-domains = <&pgc_vpu>;
> > > +                       nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>;
> > > +               };
> > > +
> > > +               vpu_g2: video-codec@...10000 {
> > > +                       compatible = "nxp,imx8mq-vpu-g2";
> > > +                       reg = <0x38310000 0x10000>;
> > > +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g2";
> > > +                       clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > +                       clock-names = "g1", "g2",  "bus";
> > > +                       assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
> > Can the G1 clock configuration be dropped from the G2 device node and
> > the G2 clock configuration from the G1 device node? It looks weird that
> > these devices configure each other's clocks.
> 
> No because if only one device node is enabled we need to configure the both
> clocks anyway.
> 

Since this is akward, how about adding a comment here in the dtsi to clarify it?

Thanks,
Ezequiel