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Message-Id: <1616913028-83376-7-git-send-email-guoren@kernel.org>
Date: Sun, 28 Mar 2021 06:30:27 +0000
From: guoren@...nel.org
To: guoren@...nel.org
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-csky@...r.kernel.org, linux-arch@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, linux-xtensa@...ux-xtensa.org,
openrisc@...ts.librecores.org, sparclinux@...r.kernel.org,
Guo Ren <guoren@...ux.alibaba.com>,
Arnd Bergmann <arnd@...db.de>,
"David S . Miller" <davem@...emloft.net>,
Rob Gardner <rob.gardner@...cle.com>
Subject: [PATCH v5 6/7] sparc: qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32
From: Guo Ren <guoren@...ux.alibaba.com>
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xchg16.
Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
Cc: Arnd Bergmann <arnd@...db.de>
Cc: David S. Miller <davem@...emloft.net>
Cc: Rob Gardner <rob.gardner@...cle.com>
---
arch/sparc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 164a5254c91c..1079fe3f058c 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -91,6 +91,7 @@ config SPARC64
select HAVE_REGS_AND_STACK_ACCESS_API
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
+ select ARCH_USE_QUEUED_SPINLOCKS_XCHG32
select GENERIC_TIME_VSYSCALL
select ARCH_CLOCKSOURCE_DATA
select ARCH_HAS_PTE_SPECIAL
--
2.17.1
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