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Message-ID: <e460b0b8-9e99-974d-e6bc-e6fc89177ecb@gmail.com>
Date: Mon, 29 Mar 2021 13:29:29 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Seiya Wang <seiya.wang@...iatek.com>,
"Rafael J . Wysocki" <rjw@...ysocki.net>,
Viresh Kumar <viresh.kumar@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com
Subject: Re: [PATCH 2/2] dt-bindings: cpufreq: update cpu type and clock name
for MT8173 SoC
On 26/03/2021 04:12, Seiya Wang wrote:
> Update the cpu type of cpu2 and cpu3 since MT8173 used Cortex-a72.
>
> Signed-off-by: Seiya Wang <seiya.wang@...iatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> ---
> Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> index ea4994b35207..ef68711716fb 100644
> --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> @@ -202,11 +202,11 @@ Example 2 (MT8173 SoC):
>
> cpu2: cpu@100 {
> device_type = "cpu";
> - compatible = "arm,cortex-a57";
> + compatible = "arm,cortex-a72";
> reg = <0x100>;
> enable-method = "psci";
> cpu-idle-states = <&CPU_SLEEP_0>;
> - clocks = <&infracfg CLK_INFRA_CA57SEL>,
> + clocks = <&infracfg CLK_INFRA_CA72SEL>,
> <&apmixedsys CLK_APMIXED_MAINPLL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cpu_opp_table_b>;
> @@ -214,11 +214,11 @@ Example 2 (MT8173 SoC):
>
> cpu3: cpu@101 {
> device_type = "cpu";
> - compatible = "arm,cortex-a57";
> + compatible = "arm,cortex-a72";
> reg = <0x101>;
> enable-method = "psci";
> cpu-idle-states = <&CPU_SLEEP_0>;
> - clocks = <&infracfg CLK_INFRA_CA57SEL>,
> + clocks = <&infracfg CLK_INFRA_CA72SEL>,
> <&apmixedsys CLK_APMIXED_MAINPLL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cpu_opp_table_b>;
>
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