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Message-ID: <20210329160607.GA9677@lpieralisi>
Date: Mon, 29 Mar 2021 17:06:07 +0100
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Jim Quinlan <jim2101024@...il.com>
Cc: Bjorn Helgaas <helgaas@...nel.org>, linux-pci@...r.kernel.org,
Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
bcm-kernel-feedback-list@...adcom.com, james.quinlan@...adcom.com,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Florian Fainelli <f.fainelli@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Jim Quinlan <jquinlan@...adcom.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 2/2] PCI: brcmstb: Use reset/rearm instead of
deassert/assert
On Fri, Mar 12, 2021 at 03:45:55PM -0500, Jim Quinlan wrote:
> The Broadcom STB PCIe RC uses a reset control "rescal" for certain chips.
> The "rescal" implements a "pulse reset" so using assert/deassert is wrong
> for this device. Instead, we use reset/rearm. We need to use rearm so
> that we can reset it after a suspend/resume cycle; w/o using "rearm", the
> "rescal" device will only ever fire once.
>
> Of course for suspend/resume to work we also need to put the reset/rearm
> calls in the suspend and resume routines.
>
> Fixes: 740d6c3708a9 ("PCI: brcmstb: Add control of rescal reset")
> Signed-off-by: Jim Quinlan <jim2101024@...il.com>
> Acked-by: Florian Fainelli <f.fainelli@...il.com>
> ---
> drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++------
> 1 file changed, 13 insertions(+), 6 deletions(-)
Should I take this patch in the PCI queue ?
Thanks,
Lorenzo
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index e330e6811f0b..3b35d629035e 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -1148,6 +1148,7 @@ static int brcm_pcie_suspend(struct device *dev)
>
> brcm_pcie_turn_off(pcie);
> ret = brcm_phy_stop(pcie);
> + reset_control_rearm(pcie->rescal);
> clk_disable_unprepare(pcie->clk);
>
> return ret;
> @@ -1163,9 +1164,13 @@ static int brcm_pcie_resume(struct device *dev)
> base = pcie->base;
> clk_prepare_enable(pcie->clk);
>
> + ret = reset_control_reset(pcie->rescal);
> + if (ret)
> + goto err_disable_clk;
> +
> ret = brcm_phy_start(pcie);
> if (ret)
> - goto err;
> + goto err_reset;
>
> /* Take bridge out of reset so we can access the SERDES reg */
> pcie->bridge_sw_init_set(pcie, 0);
> @@ -1180,14 +1185,16 @@ static int brcm_pcie_resume(struct device *dev)
>
> ret = brcm_pcie_setup(pcie);
> if (ret)
> - goto err;
> + goto err_reset;
>
> if (pcie->msi)
> brcm_msi_set_regs(pcie->msi);
>
> return 0;
>
> -err:
> +err_reset:
> + reset_control_rearm(pcie->rescal);
> +err_disable_clk:
> clk_disable_unprepare(pcie->clk);
> return ret;
> }
> @@ -1197,7 +1204,7 @@ static void __brcm_pcie_remove(struct brcm_pcie *pcie)
> brcm_msi_remove(pcie);
> brcm_pcie_turn_off(pcie);
> brcm_phy_stop(pcie);
> - reset_control_assert(pcie->rescal);
> + reset_control_rearm(pcie->rescal);
> clk_disable_unprepare(pcie->clk);
> }
>
> @@ -1278,13 +1285,13 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> return PTR_ERR(pcie->perst_reset);
> }
>
> - ret = reset_control_deassert(pcie->rescal);
> + ret = reset_control_reset(pcie->rescal);
> if (ret)
> dev_err(&pdev->dev, "failed to deassert 'rescal'\n");
>
> ret = brcm_phy_start(pcie);
> if (ret) {
> - reset_control_assert(pcie->rescal);
> + reset_control_rearm(pcie->rescal);
> clk_disable_unprepare(pcie->clk);
> return ret;
> }
> --
> 2.17.1
>
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