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Date:   Tue, 30 Mar 2021 17:23:54 +0800
From:   Zenghui Yu <yuzenghui@...wei.com>
To:     Eric Auger <eric.auger@...hat.com>
CC:     <eric.auger.pro@...il.com>, <iommu@...ts.linux-foundation.org>,
        <linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>,
        <kvmarm@...ts.cs.columbia.edu>, <will@...nel.org>,
        <maz@...nel.org>, <robin.murphy@....com>, <joro@...tes.org>,
        <alex.williamson@...hat.com>, <tn@...ihalf.com>,
        <zhukeqian1@...wei.com>, <jacob.jun.pan@...ux.intel.com>,
        <yi.l.liu@...el.com>, <wangxingang5@...wei.com>,
        <jiangkunkun@...wei.com>, <jean-philippe@...aro.org>,
        <zhangfei.gao@...aro.org>, <zhangfei.gao@...il.com>,
        <vivek.gautam@....com>, <shameerali.kolothum.thodi@...wei.com>,
        <nicoleotsuka@...il.com>, <lushenming@...wei.com>,
        <vsethi@...dia.com>, <wanghaibin.wang@...wei.com>
Subject: Re: [PATCH v14 13/13] iommu/smmuv3: Accept configs with more than one
 context descriptor

Hi Eric,

On 2021/2/24 4:56, Eric Auger wrote:
> In preparation for vSVA, let's accept userspace provided configs
> with more than one CD. We check the max CD against the host iommu
> capability and also the format (linear versus 2 level).
> 
> Signed-off-by: Eric Auger <eric.auger@...hat.com>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>
> ---
>   drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 ++++++++-----
>   1 file changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 332d31c0680f..ab74a0289893 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -3038,14 +3038,17 @@ static int arm_smmu_attach_pasid_table(struct iommu_domain *domain,
>   		if (smmu_domain->s1_cfg.set)
>   			goto out;
>   
> -		/*
> -		 * we currently support a single CD so s1fmt and s1dss
> -		 * fields are also ignored
> -		 */
> -		if (cfg->pasid_bits)
> +		list_for_each_entry(master, &smmu_domain->devices, domain_head) {
> +			if (cfg->pasid_bits > master->ssid_bits)
> +				goto out;
> +		}
> +		if (cfg->vendor_data.smmuv3.s1fmt == STRTAB_STE_0_S1FMT_64K_L2 &&
> +				!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB))
>   			goto out;
>   
>   		smmu_domain->s1_cfg.cdcfg.cdtab_dma = cfg->base_ptr;
> +		smmu_domain->s1_cfg.s1cdmax = cfg->pasid_bits;
> +		smmu_domain->s1_cfg.s1fmt = cfg->vendor_data.smmuv3.s1fmt;

And what about the SIDSS field?

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