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Message-ID: <20210330102244.7dkzemtgrm7epmpv@bogus>
Date:   Tue, 30 Mar 2021 11:22:44 +0100
From:   Sudeep Holla <sudeep.holla@....com>
To:     Viresh Kumar <viresh.kumar@...aro.org>
Cc:     Rob Herring <robh@...nel.org>, Sudeep.Holla@....com,
        Hector Yuan <hector.yuan@...iatek.com>,
        linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-pm@...r.kernel.org,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Matthias Brugger <matthias.bgg@...il.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        wsd_upstream@...iatek.com
Subject: Re: [PATCH v11 2/2] dt-bindings: cpufreq: add bindings for MediaTek
 cpufreq HW

On Tue, Mar 30, 2021 at 08:26:43AM +0530, Viresh Kumar wrote:
> On 24-03-21, 10:07, Rob Herring wrote:
> > On Fri, Mar 12, 2021 at 07:40:35PM +0800, Hector Yuan wrote:
> > > From: "Hector.Yuan" <hector.yuan@...iatek.com>
> > > 
> > > Add devicetree bindings for MediaTek HW driver.
> > > 
> > > Signed-off-by: Hector.Yuan <hector.yuan@...iatek.com>
> > > ---
> > >  .../bindings/cpufreq/cpufreq-mediatek-hw.yaml      |  127 ++++++++++++++++++++
> > >  1 file changed, 127 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > > 
> > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > > new file mode 100644
> > > index 0000000..0f3ad47
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > > @@ -0,0 +1,127 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: MediaTek's CPUFREQ Bindings
> > > +
> > > +maintainers:
> > > +  - Hector Yuan <hector.yuan@...iatek.com>
> > > +
> > > +description:
> > > +  CPUFREQ HW is a hardware engine used by MediaTek
> > > +  SoCs to manage frequency in hardware. It is capable of controlling frequency
> > > +  for multiple clusters.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: mediatek,cpufreq-hw
> > > +
> > > +  reg:
> > > +    minItems: 1
> > > +    maxItems: 2
> > > +    description: |
> > > +      Addresses and sizes for the memory of the
> > > +      HW bases in each frequency domain.
> > > +
> > > +  "#performance-domain-cells":
> > 
> > A common binding schema for this and 'performance-domains' needs to land 
> > first.
> 
> Sudeep, what happened to the series you had on this ? This patchset
> has been blocked for a long time now, can we get that merged soonish
> somehow ?

Sorry, it slipped through the cracks. I posted this as a fix for SCMI which
we fixed it later. This got de-prioritised in my todo list. Sorry for that.
I think main problem I had is to write a proper select statement in YAML
scheme to check the DT nodes when it is present. I couldn't get anything
similar for reference from clocks.

I had "select: false" which I knew was not acceptable as it can't go throw
dt_bindings_check. I am happy if someone wants to pick up and work on that
to push the change or provide suggestions that I can try out. I am unable
to spend more time trying to understand whole YAML schema ATM.

-- 
Regards,
Sudeep

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