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Message-Id: <20210330013408.2532048-1-john.stultz@linaro.org>
Date: Tue, 30 Mar 2021 01:34:08 +0000
From: John Stultz <john.stultz@...aro.org>
To: lkml <linux-kernel@...r.kernel.org>
Cc: John Stultz <john.stultz@...aro.org>,
Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Jordan Crouse <jcrouse@...eaurora.org>,
Eric Anholt <eric@...olt.net>,
Douglas Anderson <dianders@...omium.org>,
linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
YongQin Liu <yongqin.liu@...aro.org>
Subject: [PATCH] drm/msm: Fix removal of valid error case when checking speed_bin
Commit 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to
access outside valid memory"), reworked the nvmem reading of
"speed_bin", but in doing so dropped handling of the -ENOENT
case which was previously documented as "fine".
That change resulted in the db845c board display to fail to
start, with the following error:
adreno 5000000.gpu: [drm:a6xx_gpu_init] *ERROR* failed to read speed-bin (-2). Some OPPs may not be supported by hardware
Thus, this patch simply re-adds the ENOENT handling so the lack
of the speed_bin entry isn't fatal for display, and gets things
working on db845c.
Cc: Rob Clark <robdclark@...il.com>
Cc: Sean Paul <sean@...rly.run>
Cc: Jordan Crouse <jcrouse@...eaurora.org>
Cc: Eric Anholt <eric@...olt.net>
Cc: Douglas Anderson <dianders@...omium.org>
Cc: linux-arm-msm@...r.kernel.org
Cc: freedreno@...ts.freedesktop.org
Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: YongQin Liu <yongqin.liu@...aro.org>
Reported-by: YongQin Liu <yongqin.liu@...aro.org>
Fixes: 7bf168c8fe8c ("drm/msm: Fix speed-bin support not to access outside valid memory")
Signed-off-by: John Stultz <john.stultz@...aro.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 690409ca8a186..cb2df8736ca85 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1406,7 +1406,13 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
int ret;
ret = nvmem_cell_read_u16(dev, "speed_bin", &speedbin);
- if (ret) {
+ /*
+ * -ENOENT means that the platform doesn't support speedbin which is
+ * fine
+ */
+ if (ret == -ENOENT) {
+ return 0;
+ } else if (ret) {
DRM_DEV_ERROR(dev,
"failed to read speed-bin (%d). Some OPPs may not be supported by hardware",
ret);
--
2.25.1
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