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Message-ID: <20210330144048.GA264685@robh.at.kernel.org>
Date: Tue, 30 Mar 2021 09:40:48 -0500
From: Rob Herring <robh@...nel.org>
To: nikitos.tr@...il.com
Cc: agross@...nel.org, bjorn.andersson@...aro.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: soc: qcom: Add bindings for Qualcomm
Memshare service
On Fri, Mar 19, 2021 at 10:23:20PM +0500, nikitos.tr@...il.com wrote:
> From: Nikita Travkin <nikitos.tr@...il.com>
>
> Add DT bindings for memshare: QMI service that allocates
> memory per remote processor request.
>
> Signed-off-by: Nikita Travkin <nikitos.tr@...il.com>
> ---
> .../bindings/soc/qcom/qcom,memshare.yaml | 109 ++++++++++++++++++
> include/dt-bindings/soc/qcom,memshare.h | 10 ++
> 2 files changed, 119 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,memshare.yaml
> create mode 100644 include/dt-bindings/soc/qcom,memshare.h
>
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,memshare.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,memshare.yaml
> new file mode 100644
> index 000000000000..ebdf128b066c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,memshare.yaml
> @@ -0,0 +1,109 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/soc/qcom/qcom,memshare.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm QMI Shared Memory Service
How many shared memory interfaces does Qcom have...
> +
> +description: |
> + This driver provides a QMI service that allows remote processors (like modem)
> + to request additional memory. It is used for applications like GPS in modem.
If the memory region is defined in reserved-memory, how are you
allocating additional memory?
> +
> +maintainers:
> + - Nikita Travkin <nikitos.tr@...il.com>
> +
> +properties:
> + compatible:
> + const: qcom,memshare
> +
> + qcom,legacy-client:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: Phandle to a memshare client node used for legacy requests.
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> +patternProperties:
> + "^.*@[0-9]+$":
> + type: object
> +
> + properties:
> + reg:
> + description: Proc-ID for clients in this node.
What's Proc-ID?
> +
> + qcom,qrtr-node:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Node from which the requests are expected.
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + patternProperties:
> + "^.*@[0-9]+$":
> + type: object
> +
> + properties:
> + reg:
> + description: ID of this client.
How does one determine the ID?
> +
> + memory-region:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: |
> + Reserved memory region that should be used for allocation.
> +
> + required:
> + - reg
> +
> + required:
> + - reg
> + - qcom,qrtr-node
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/soc/qcom,memshare.h>
> +
> + reserved-memory {
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + gps_mem: gps@...00000 {
> + reg = <0x0 0x93c00000 0x0 0x200000>;
> + no-map;
We support 'compatible' in reserved-memory nodes, can you simplify the
binding and put everything in here?
> + };
> + };
> +
> + memshare {
> + compatible = "qcom,memshare";
> + qcom,legacy-client = <&memshare_gps>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mpss@0 {
> + reg = <MEMSHARE_PROC_MPSS_V01>;
> + qcom,qrtr-node = <0>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + memshare_gps: gps@0 {
> + reg = <0>;
> + memory-region = <&gps_mem>;
> + };
> + };
> + };
> +
> +...
> diff --git a/include/dt-bindings/soc/qcom,memshare.h b/include/dt-bindings/soc/qcom,memshare.h
> new file mode 100644
> index 000000000000..4cef1ef75d09
> --- /dev/null
> +++ b/include/dt-bindings/soc/qcom,memshare.h
> @@ -0,0 +1,10 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +
> +#ifndef __DT_QCOM_MEMSHARE_H__
> +#define __DT_QCOM_MEMSHARE_H__
> +
> +#define MEMSHARE_PROC_MPSS_V01 0
> +#define MEMSHARE_PROC_ADSP_V01 1
> +#define MEMSHARE_PROC_WCNSS_V01 2
> +
> +#endif /* __DT_QCOM_MEMSHARE_H__ */
> --
> 2.27.0
>
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