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Message-ID: <YGRvG+3sD0gX2I+b@vkoul-mobl.Dlink>
Date: Wed, 31 Mar 2021 18:16:19 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Alex Dewar <alex.dewar90@...il.com>,
Atul Gopinathan <leoatul12@...il.com>,
Kishon Vijay Abraham I <kishon@...com>,
Rob Herring <robh+dt@...nel.org>,
Yu Chen <chenyu56@...wei.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-staging@...ts.linux.dev, Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v5 (RESEND) 1/7] phy: phy-hi3670-usb3: move driver from
staging into phy
On 25-03-21, 19:05, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
Overall lgtm, some nits below. With those fixed:
Acked-By: Vinod Koul <vkoul@...nel.org>
> +static int hi3670_phy_cr_clk(struct regmap *usb31misc)
> +{
> + int ret;
> +
> + /* Clock up */
> + ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
> + CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
> + if (ret)
> + return ret;
> +
> + /* Clock down */
> + ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
> + CFG54_USB31PHY_CR_CLK, 0);
> +
> + return ret;
return regmap_update_bits() ?
(i see few more in driver like this, pls change others as well)
> +static int hi3670_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
> +{
> + int reg;
> + int i;
> + int ret;
all these could be in a single line
--
~Vinod
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