linux-kernel - Re: [PATCH 3/3] mfd: tqmx86: add support for TQMxE40M

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Message-ID: <83d7ea27b27225727fec7b077efe1a67ba1184a9.camel@ew.tq-group.com>
Date:   Wed, 31 Mar 2021 15:33:04 +0200
From:   Matthias Schiffer <matthias.schiffer@...tq-group.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Lee Jones <lee.jones@...aro.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/3] mfd: tqmx86: add support for TQMxE40M

On Wed, 2021-03-31 at 15:37 +0300, Andy Shevchenko wrote:
> On Wed, Mar 31, 2021 at 2:38 PM Matthias Schiffer
> <matthias.schiffer@...tq-group.com> wrote:
> > 
> > All future TQMx86 SoMs will use a 24MHz LPC clock, so we can use that as
> > a default instead of listing each new module individually.
> 
> ...
> 
> >         case TQMX86_REG_BOARD_ID_90UC:
> >                 return "TQMx90UC";
> > +       case TQMX86_REG_BOARD_ID_E40M:
> > +               return "TQMxE40M";
> >         default:
> >                 return "Unknown";
> >         }
> > @@ -138,12 +141,6 @@ static const char *tqmx86_board_id_to_name(u8 board_id)
> >  static int tqmx86_board_id_to_clk_rate(u8 board_id)
> >  {
> >         switch (board_id) {
> > -       case TQMX86_REG_BOARD_ID_50UC:
> > -       case TQMX86_REG_BOARD_ID_60EB:
> > -       case TQMX86_REG_BOARD_ID_70EB:
> > -       case TQMX86_REG_BOARD_ID_80UC:
> > -       case TQMX86_REG_BOARD_ID_90UC:
> > -               return 24000;
> >         case TQMX86_REG_BOARD_ID_E39M:
> >         case TQMX86_REG_BOARD_ID_E39C:
> >         case TQMX86_REG_BOARD_ID_E39x:
> > @@ -152,7 +149,7 @@ static int tqmx86_board_id_to_clk_rate(u8 board_id)
> >         case TQMX86_REG_BOARD_ID_E38C:
> >                 return 33000;
> >         default:
> > -               return 0;
> > +               return 24000;
> 
> AFAICS it will return 24 MHz for "Unknown" board. Is it okay to be so brave?

As noted in the commit message, our hardware developers intend to use
24 MHz for all future x86 SoMs.