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Message-ID: <007362e2-a8df-050b-8c41-1756981bb071@intel.com>
Date:   Thu, 1 Apr 2021 13:13:16 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Andy Lutomirski <luto@...nel.org>
Cc:     Andi Kleen <ak@...ux.intel.com>,
        Kirill Shutemov <kirill.shutemov@...ux.intel.com>,
        Kuppuswamy Sathyanarayanan <knsathya@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Raj Ashok <ashok.raj@...el.com>,
        Sean Christopherson <seanjc@...gle.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [RFC v1 22/26] x86/tdx: Exclude Shared bit from __PHYSICAL_MASK

On 2/5/21 3:38 PM, Kuppuswamy Sathyanarayanan wrote:
> From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
> 
> tdx_shared_mask() returns the mask that has to be set in page table
> entry to make page shared with VMM.

Needs to be either:

	has to be set in a page table entry
or
	has to be set in page table entries

Pick one, please.  But, the grammar is wrong as-is.


> index 8fa654d61ac2..f10a00c4ad7f 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -875,6 +875,7 @@ config INTEL_TDX_GUEST
>  	select PARAVIRT_XL
>  	select X86_X2APIC
>  	select SECURITY_LOCKDOWN_LSM
> +	select X86_MEM_ENCRYPT_COMMON
>  	help
>  	  Provide support for running in a trusted domain on Intel processors
>  	  equipped with Trusted Domain eXtenstions. TDX is an new Intel
> diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h
> index b46ae140e39b..9bbfe6520ea4 100644
> --- a/arch/x86/include/asm/tdx.h
> +++ b/arch/x86/include/asm/tdx.h
> @@ -104,5 +104,6 @@ long tdx_kvm_hypercall3(unsigned int nr, unsigned long p1, unsigned long p2,
>  long tdx_kvm_hypercall4(unsigned int nr, unsigned long p1, unsigned long p2,
>  		unsigned long p3, unsigned long p4);
>  
> +phys_addr_t tdx_shared_mask(void);

I know it's redundant, but extern this, please.  Ditto for all the other
declarations in that header.

>  #endif
>  #endif /* _ASM_X86_TDX_H */
> diff --git a/arch/x86/kernel/tdx.c b/arch/x86/kernel/tdx.c
> index ae37498df981..9681f4a0b4e0 100644
> --- a/arch/x86/kernel/tdx.c
> +++ b/arch/x86/kernel/tdx.c
> @@ -41,6 +41,11 @@ bool is_tdx_guest(void)
>  }
>  EXPORT_SYMBOL_GPL(is_tdx_guest);
>  
> +phys_addr_t tdx_shared_mask(void)
> +{
> +	return 1ULL << (td_info.gpa_width - 1);
> +}

A comment would be helpful:

/* The highest bit of a guest physical address is the "sharing" bit */

>  static void tdx_get_info(void)
>  {
>  	register long rcx asm("rcx");
> @@ -56,6 +61,9 @@ static void tdx_get_info(void)
>  
>  	td_info.gpa_width = rcx & GENMASK(5, 0);
>  	td_info.attributes = rdx;
> +
> +	/* Exclude Shared bit from the __PHYSICAL_MASK */
> +	physical_mask &= ~tdx_shared_mask();
>  }

I wish we had all of these 'physical_mask' manipulations in a single
spot.  Can we consolidate these instead of having TDX and SME poke at
them individually?

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