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Message-Id: <1617346747-8611-2-git-send-email-manafm@codeaurora.org>
Date: Fri, 2 Apr 2021 12:29:06 +0530
From: Manaf Meethalavalappu Pallikunhi <manafm@...eaurora.org>
To: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Meethalavalappu Pallikunhi <manafm@...eaurora.org>,
Ram Chandrasekar <rkumbako@...eaurora.org>,
Taniya Das <tdas@...eaurora.org>,
Akhil P Oommen <akhilpo@...eaurora.org>
Subject: [RFC PATCH 1/2] dt-bindings: soc: qcom: Add SDPM clock monitor driver documentation in yaml
Add yaml documentation for SDPM clock monitor driver which will
register for clock rate change notification and writes the clock rate
into SDPM CSR register.
Signed-off-by: Ram Chandrasekar <rkumbako@...eaurora.org>
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@...eaurora.org>
---
.../devicetree/bindings/soc/qcom/qcom-sdpm.yaml | 68 ++++++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom-sdpm.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom-sdpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom-sdpm.yaml
new file mode 100644
index 00000000..20df362
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom-sdpm.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom-sdpm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Simple Digital Power Meter(SDPM) clock monitoring
+
+maintainers:
+ - Manaf Meethalavalappu Pallikunhi <manafm@...eaurora.org>
+ - Ram Chandrasekar <rkumbako@...eaurora.org>
+
+description: |
+
+ SDPM is used to monitor the operating frequency of different clocks and based
+ on operating levels of different clients, RDPM (Rail Digital Power Meter)
+ hardware estimates total power consumption of a shared railway. The SDPM
+ clock monitor driver will register with the clock framework for rate change
+ notification of different clocks. These clock rate will be updated to SDPM.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sdpm
+
+ reg:
+ items:
+ - description: RDPM hardware base address
+
+ clocks:
+ items:
+ minItems: 1
+ maxItems: 8
+ description: Different clock source
+
+ clock-names:
+ items:
+ minItems: 1
+ maxItems: 8
+ description: Different clock source name
+
+ csr-id:
+ $ref: '/schemas/types.yaml#/definitions/uint32-array'
+ description: SDPM CSR IDs matching the clock order mentioned in the
+ clocks property.
+ minItems: 1
+ maxItems: 8
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - csr-id
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,camcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ cx_sdpm@...000 {
+ compatible = "qcom,sdpm";
+ reg = <0x634000 0x1000>;
+ clocks = <&clock_camcc CAM_CC_IPE_0_CLK_SRC>,
+ <&clock_gcc GCC_GP1_CLK_SRC>;
+ clock-names = "cam_cc_ipe", "gcc_gp1";
+ csr-id = <5 7>;
+ };
+...
--
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