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Date:   Fri,  2 Apr 2021 21:20:53 +0200
From:   Dario Binacchi <dariobin@...ero.it>
To:     linux-kernel@...r.kernel.org
Cc:     Dario Binacchi <dariobin@...ero.it>, Bin Meng <bmeng.cn@...il.com>,
        Frank Rowand <frowand.list@...il.com>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: [PATCH 1/2] fdt: translate address if #size-cells = <0>

The __of_translate_address() translates an address from the device tree
into a CPU physical address. A note in the description of the routine
explains that the crossing of any level with #size-cells = <0> can not
be mapped to a CPU physical address not because it's really specified
that way, but because this is traditionally the way IBM at least do
things. This does not happen for Texas Instruments, or at least for the
beaglebone device tree. Without this patch, in fact, the translation into
physical addresses of the registers contained in the am33xx-clocks.dtsi
nodes would not be possible. They all have a parent with #size-cells = <0>.

The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.

The patch has been tested on a beaglebone black board. The addresses
generated for the clock registers are those specified by the AM335x
reference manual.

Signed-off-by: Dario Binacchi <dariobin@...ero.it>
---

 drivers/of/Kconfig       | 13 +++++++++++++
 drivers/of/address.c     |  8 +++++++-
 drivers/of/fdt_address.c |  6 ++++--
 3 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 18450437d5d5..5a76c8c23de6 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -100,4 +100,17 @@ config OF_DMA_DEFAULT_COHERENT
 	# arches should select this if DMA is coherent by default for OF devices
 	bool
 
+
+config OF_TRANSLATE_ZERO_SIZE_CELLS
+	bool "Enable translation for zero size cells"
+	depends on OF_EARLY_FLATTREE || OF_ADDRESS
+	default y if SOC_AM33XX
+	help
+	  The routine used to translate an FDT address into a physical CPU
+	  address was developed by IBM. It considers that crossing any level
+	  with #size-cells = <0> makes translation impossible, even if it is
+	  not the way it was specified.
+	  Enabling this option makes translation possible even in the case
+	  of crossing levels with #size-cells = <0>.
+
 endif # OF
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 73ddf2540f3f..7b7ef69fb126 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -20,7 +20,10 @@
 /* Max address size we deal with */
 #define OF_MAX_ADDR_CELLS	4
 #define OF_CHECK_ADDR_COUNT(na)	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
-#define OF_CHECK_COUNTS(na, ns)	(OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
+#define OF_CHECK_COUNTS(na, ns)						\
+	(OF_CHECK_ADDR_COUNT(na) &&					\
+	 ((ns) > 0 || (IS_ENABLED(CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS) && \
+		      (ns) == 0)))
 
 static struct of_bus *of_match_bus(struct device_node *np);
 static int __of_address_to_resource(struct device_node *dev,
@@ -420,6 +423,9 @@ static struct of_bus *of_match_bus(struct device_node *np)
 
 static int of_empty_ranges_quirk(struct device_node *np)
 {
+	if (IS_ENABLED(CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS))
+		return true;
+
 	if (IS_ENABLED(CONFIG_PPC)) {
 		/* To save cycles, we cache the result for global "Mac" setting */
 		static int quirk_state = -1;
diff --git a/drivers/of/fdt_address.c b/drivers/of/fdt_address.c
index 1dc15ab78b10..09c78c94c1b5 100644
--- a/drivers/of/fdt_address.c
+++ b/drivers/of/fdt_address.c
@@ -19,8 +19,10 @@
 
 /* Max address size we deal with */
 #define OF_MAX_ADDR_CELLS	4
-#define OF_CHECK_COUNTS(na, ns)	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
-			(ns) > 0)
+#define OF_CHECK_COUNTS(na, ns)						\
+	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS &&			\
+	 ((ns) > 0 || (IS_ENABLED(CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS) && \
+		       (ns) == 0)))
 
 /* Debug utility */
 #ifdef DEBUG
-- 
2.17.1

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