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Message-ID: <20210405222313.GB904837@yoga>
Date: Mon, 5 Apr 2021 17:23:13 -0500
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Thara Gopinath <thara.gopinath@...aro.org>
Cc: herbert@...dor.apana.org.au, davem@...emloft.net,
ebiggers@...gle.com, ardb@...nel.org, sivaprak@...eaurora.org,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/7] crypto: qce: common: Make result dump optional
On Thu 25 Feb 12:27 CST 2021, Thara Gopinath wrote:
> Qualcomm crypto engine allows for IV registers and status register
> to be concatenated to the output. This option is enabled by setting the
> RESULTS_DUMP field in GOPROC register. This is useful for most of the
> algorithms to either retrieve status of operation or in case of
> authentication algorithms to retrieve the mac. But for ccm
> algorithms, the mac is part of the output stream and not retrieved
> from the IV registers, thus needing a separate buffer to retrieve it.
> Make enabling RESULTS_DUMP field optional so that algorithms can choose
> whether or not to enable the option.
> Note that in this patch, the enabled algorithms always choose
> RESULTS_DUMP to be enabled. But later with the introduction of ccm
> algorithms, this changes.
>
> Signed-off-by: Thara Gopinath <thara.gopinath@...aro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Regards,
Bjorn
> ---
> drivers/crypto/qce/common.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
> index 7c3cb483749e..2485aa371d83 100644
> --- a/drivers/crypto/qce/common.c
> +++ b/drivers/crypto/qce/common.c
> @@ -88,9 +88,12 @@ static void qce_setup_config(struct qce_device *qce)
> qce_write(qce, REG_CONFIG, config);
> }
>
> -static inline void qce_crypto_go(struct qce_device *qce)
> +static inline void qce_crypto_go(struct qce_device *qce, bool result_dump)
> {
> - qce_write(qce, REG_GOPROC, BIT(GO_SHIFT) | BIT(RESULTS_DUMP_SHIFT));
> + if (result_dump)
> + qce_write(qce, REG_GOPROC, BIT(GO_SHIFT) | BIT(RESULTS_DUMP_SHIFT));
> + else
> + qce_write(qce, REG_GOPROC, BIT(GO_SHIFT));
> }
>
> #ifdef CONFIG_CRYPTO_DEV_QCE_SHA
> @@ -219,7 +222,7 @@ static int qce_setup_regs_ahash(struct crypto_async_request *async_req)
> config = qce_config_reg(qce, 1);
> qce_write(qce, REG_CONFIG, config);
>
> - qce_crypto_go(qce);
> + qce_crypto_go(qce, true);
>
> return 0;
> }
> @@ -380,7 +383,7 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req)
> config = qce_config_reg(qce, 1);
> qce_write(qce, REG_CONFIG, config);
>
> - qce_crypto_go(qce);
> + qce_crypto_go(qce, true);
>
> return 0;
> }
> --
> 2.25.1
>
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