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Message-Id: <20210405085712.1953848-2-mick@ics.forth.gr>
Date: Mon, 5 Apr 2021 11:57:08 +0300
From: Nick Kossifidis <mick@....forth.gr>
To: linux-riscv@...ts.infradead.org, palmer@...belt.com
Cc: paul.walmsley@...ive.com, linux-kernel@...r.kernel.org,
Nick Kossifidis <mick@....forth.gr>
Subject: [PATCH v3 1/5] RISC-V: Add EM_RISCV to kexec UAPI header
Add RISC-V to the list of supported kexec architecturs, we need to
add the definition early-on so that later patches can use it.
EM_RISCV is 243 as per ELF psABI specification here:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
Signed-off-by: Nick Kossifidis <mick@....forth.gr>
---
include/uapi/linux/kexec.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/kexec.h b/include/uapi/linux/kexec.h
index 05669c87a..778dc191c 100644
--- a/include/uapi/linux/kexec.h
+++ b/include/uapi/linux/kexec.h
@@ -42,6 +42,7 @@
#define KEXEC_ARCH_MIPS_LE (10 << 16)
#define KEXEC_ARCH_MIPS ( 8 << 16)
#define KEXEC_ARCH_AARCH64 (183 << 16)
+#define KEXEC_ARCH_RISCV (243 << 16)
/* The artificial cap on the number of segments passed to kexec_load. */
#define KEXEC_SEGMENT_MAX 16
--
2.26.2
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