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Message-Id: <1617635467-181510-26-git-send-email-kan.liang@linux.intel.com>
Date: Mon, 5 Apr 2021 08:11:07 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...nel.org,
linux-kernel@...r.kernel.org
Cc: acme@...nel.org, tglx@...utronix.de, bp@...en8.de,
namhyung@...nel.org, jolsa@...hat.com, ak@...ux.intel.com,
yao.jin@...ux.intel.com, alexander.shishkin@...ux.intel.com,
adrian.hunter@...el.com, ricardo.neri-calderon@...ux.intel.com,
Zhang Rui <rui.zhang@...el.com>
Subject: [PATCH V5 25/25] perf/x86/rapl: Add support for Intel Alder Lake
From: Zhang Rui <rui.zhang@...el.com>
Alder Lake RAPL support is the same as previous Sky Lake.
Add Alder Lake model for RAPL.
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Zhang Rui <rui.zhang@...el.com>
---
arch/x86/events/rapl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
index f42a704..84a1042 100644
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -800,6 +800,8 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &model_hsx),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl),
+ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl),
+ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr),
X86_MATCH_VENDOR_FAM(AMD, 0x17, &model_amd_fam17h),
X86_MATCH_VENDOR_FAM(HYGON, 0x18, &model_amd_fam17h),
--
2.7.4
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