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Message-ID: <20210406181325.62htotc2y4eag4ar@ti.com>
Date: Tue, 6 Apr 2021 23:43:27 +0530
From: Pratyush Yadav <p.yadav@...com>
To: Laurent Pinchart <laurent.pinchart@...asonboard.com>
CC: Rob Herring <robh@...nel.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Peter Ujfalusi <peter.ujfalusi@...il.com>,
Maxime Ripard <mripard@...nel.org>,
Benoit Parrot <bparrot@...com>,
Hans Verkuil <hverkuil-cisco@...all.nl>,
Alexandre Courbot <acourbot@...omium.org>,
Stanimir Varbanov <stanimir.varbanov@...aro.org>,
Helen Koike <helen.koike@...labora.com>,
Michael Tretter <m.tretter@...gutronix.de>,
Peter Chen <peter.chen@....com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
<linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
<dmaengine@...r.kernel.org>, Vignesh Raghavendra <vigneshr@...com>,
Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
Subject: Re: [PATCH 12/16] dt-bindings: media: Add DT bindings for TI CSI2RX
driver
On 02/04/21 01:01PM, Laurent Pinchart wrote:
> On Thu, Apr 01, 2021 at 10:52:01AM -0500, Rob Herring wrote:
> > On Tue, Mar 30, 2021 at 11:03:44PM +0530, Pratyush Yadav wrote:
> > > TI's J721E uses the Cadence CSI2RX and DPHY peripherals to facilitate
> > > capture over a CSI-2 bus. The TI CSI2RX platform driver glues all the
> > > parts together.
> > >
> > > Signed-off-by: Pratyush Yadav <p.yadav@...com>
> > > ---
> > > .../devicetree/bindings/media/ti,csi2rx.yaml | 70 +++++++++++++++++++
> > > 1 file changed, 70 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/media/ti,csi2rx.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/media/ti,csi2rx.yaml b/Documentation/devicetree/bindings/media/ti,csi2rx.yaml
> > > new file mode 100644
> > > index 000000000000..ebd894364391
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/media/ti,csi2rx.yaml
> > > @@ -0,0 +1,70 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/media/ti,csi2rx.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: TI CSI2RX Wrapper Device Tree Bindings
> > > +
>
> A description would be useful, especially given that the TRM doesn't
> mention "CSI2RX".
Ok.
>
> > > +maintainers:
> > > + - Pratyush Yadav <p.yadav@...com>
> > > +
> > > +properties:
> > > + compatible:
> > > + items:
> > > + - const: ti,csi2rx
> > > +
> > > + dmas:
> > > + description: RX DMA Channel 0
> >
> > items:
> > - description: RX DMA Channel 0
> >
> > Or just 'maxItems: 1'
> >
> > > +
> > > + dma-names:
> > > + items:
> > > + - const: rx0
> > > +
> > > + reg:
> > > + maxItems: 1
> > > + description: Base address and size of the TI wrapper registers.
> >
> > That's all 'reg' properties, drop 'description'.
>
> According to SPRUIL1B, there are four register banks for the CSI_RX_IF,
> and two register banks for the DPHY_RX. What's your plan to support
> these ? Not everything need to be implemented at once, but backward
> compatibility need to be taken into account in the design.
The CSI_RX_IF0_ECC_AGGR_CFG register bank is for safety requirements.
The driver does not use them. The CSI_RX_IF0_RX_SHIM_VBUSP_MMR_CSI2RXIF
register bank is for the TI wrapper around the Cadence CSI2RX bridge
that deals with DMA threads. This bank is what this binding is concerned
with. The CSI_RX_IF0_VBUS2APB_WRAP_VBUS_APB_CSI2RX bank is for the
Cadence CSI2RX bridge. The Cadence schema should deal with that. And
lastly, I don't know what the CSI_RX_IF0_CP_INTD_CFG_INTD_CFG bank is
for. The driver does not use it.
I don't forsee the first and last bank being used in Kernel, but if we
want to be safe I can change maxItems to 3. Sounds good?
>
> > > +
> > > + power-domains:
> > > + maxItems: 1
> > > + description:
> > > + PM domain provider node and an args specifier containing
> > > + the device id value.
> >
> > Drop.
> >
> > > +
> > > + ranges: true
> > > +
> > > + "#address-cells":
> > > + const: 2
> > > +
> > > + "#size-cells":
> > > + const: 2
> > > +
> > > +patternProperties:
> > > + "csi-bridge@":
> >
> > "^csi-bridge@"
> >
> > > + type: object
> > > + description: CSI2 bridge node.
> >
> > Just an empty node?
>
> Even if the node is optional, it would be useful to include it in the
> example below, to show how it's supposed to be used.
It is not optional. It should be the Cadence CSI2RX bridge node. Will
add it in the example. I also need to see if there is any way to make a
patternProperty a required property.
>
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - dmas
> > > + - dma-names
> > > + - power-domains
> > > + - "#address-cells"
> > > + - "#size-cells"
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + #include <dt-bindings/soc/ti,sci_pm_domain.h>
> > > +
> > > + ti_csi2rx0: ticsi2rx {
> > > + compatible = "ti,csi2rx";
> > > + dmas = <&main_udmap 0x4940>;
> > > + dma-names = "rx0";
> > > + reg = <0x0 0x4500000 0x0 0x1000>;
> > > + power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
> > > + #address-cells = <2>;
> > > + #size-cells = <2>;
> > > + };
>
> --
> Regards,
>
> Laurent Pinchart
--
Regards,
Pratyush Yadav
Texas Instruments Inc.
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