linux-kernel - Re: [PATCH][next] clk: socfpga: remove redundant initialization of variable div

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Message-ID: <128f3972-d83a-6103-647e-d84f1ebfaa5c@kernel.org>
Date:   Tue, 6 Apr 2021 13:37:40 -0500
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     Colin King <colin.king@...onical.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org
Cc:     kernel-janitors@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH][next] clk: socfpga: remove redundant initialization of
 variable div



On 4/6/21 1:27 PM, Colin King wrote:
> From: Colin Ian King <colin.king@...onical.com>
> 
> The variable div is being initialized with a value that is
> never read and it is being updated later with a new value.  The
> initialization is redundant and can be removed.
> 
> Addresses-Coverity: ("Unused value")
> Signed-off-by: Colin Ian King <colin.king@...onical.com>
> ---
>   drivers/clk/socfpga/clk-gate-s10.c | 2 +-
>   drivers/clk/socfpga/clk-pll-s10.c  | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/socfpga/clk-gate-s10.c b/drivers/clk/socfpga/clk-gate-s10.c
> index f9f403d7bb58..b84f2627551e 100644
> --- a/drivers/clk/socfpga/clk-gate-s10.c
> +++ b/drivers/clk/socfpga/clk-gate-s10.c
> @@ -31,7 +31,7 @@ static unsigned long socfpga_dbg_clk_recalc_rate(struct clk_hw *hwclk,
>   						  unsigned long parent_rate)
>   {
>   	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
> -	u32 div = 1, val;
> +	u32 div, val;
>   
>   	val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
>   	val &= GENMASK(socfpgaclk->width - 1, 0);
> diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c
> index bc37461d43c0..70076a80149d 100644
> --- a/drivers/clk/socfpga/clk-pll-s10.c
> +++ b/drivers/clk/socfpga/clk-pll-s10.c
> @@ -107,7 +107,7 @@ static unsigned long clk_boot_clk_recalc_rate(struct clk_hw *hwclk,
>   					 unsigned long parent_rate)
>   {
>   	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
> -	u32 div = 1;
> +	u32 div;
>   
>   	div = ((readl(socfpgaclk->hw.reg) &
>   		SWCTRLBTCLKSEL_MASK) >>
> 

Acked-by: Dinh Nguyen <dinguyen@...nel.org>