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Message-ID: <1617698636.26944.8.camel@mhfsdcap03>
Date: Tue, 6 Apr 2021 16:43:56 +0800
From: Yong Wu <yong.wu@...iatek.com>
To: Fabien Parent <fparent@...libre.com>
CC: Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
<mkorpershoek@...libre.com>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/5] arm64: dts: mediatek: mt8167: add larb nodes
On Mon, 2021-04-05 at 22:08 +0200, Fabien Parent wrote:
> Add larb nodes for MT8167:
> * larb0 is used for display (dsi and hdmi)
> * larb1 is used for camera (csi)
> * larb2 is used for the video hardware decoder
>
> Signed-off-by: Fabien Parent <fparent@...libre.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8167.dtsi | 33 ++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
> index 4b951f81db9e..9b352031c5f6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
> @@ -140,5 +140,38 @@ smi_common: smi@...17000 {
> clock-names = "apb", "smi";
> power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
> };
> +
> + larb0: larb@...16000 {
> + compatible = "mediatek,mt8167-smi-larb";
> + reg = <0 0x14016000 0 0x1000>;
> + mediatek,smi = <&smi_common>;
> + mediatek,larbid = <0>;
From [1], This should be: mediatek,larb-id.
Actually this property is unnecessary in this SoC since this larb-id in
the m4u node is consecutive.
[1]
https://elixir.bootlin.com/linux/v5.12-rc2/source/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml#L58
> + clocks = <&mmsys CLK_MM_SMI_LARB0>,
> + <&mmsys CLK_MM_SMI_LARB0>;
> + clock-names = "apb", "smi";
> + power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
> + };
> +
> + larb1: larb@...01000 {
> + compatible = "mediatek,mt8167-smi-larb";
> + reg = <0 0x15001000 0 0x1000>;
> + mediatek,smi = <&smi_common>;
> + mediatek,larbid = <1>;
> + clocks = <&imgsys CLK_IMG_LARB1_SMI>,
> + <&imgsys CLK_IMG_LARB1_SMI>;
> + clock-names = "apb", "smi";
> + power-domains = <&spm MT8167_POWER_DOMAIN_ISP>;
> + };
> +
> + larb2: larb@...10000 {
> + compatible = "mediatek,mt8167-smi-larb";
> + reg = <0 0x16010000 0 0x1000>;
> + mediatek,smi = <&smi_common>;
> + mediatek,larbid = <2>;
> + clocks = <&vdecsys CLK_VDEC_CKEN>,
> + <&vdecsys CLK_VDEC_LARB1_CKEN>;
> + clock-names = "apb", "smi";
> + power-domains = <&spm MT8167_POWER_DOMAIN_VDEC>;
> + };
> };
> };
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