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Message-ID: <YGx8c5Jt2D7fB0cO@lunn.ch>
Date: Tue, 6 Apr 2021 17:21:23 +0200
From: Andrew Lunn <andrew@...n.ch>
To: DENG Qingfang <dqfext@...il.com>
Cc: "David S. Miller" <davem@...emloft.net>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Jakub Kicinski <kuba@...nel.org>,
Landen Chao <Landen.Chao@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Russell King <linux@...linux.org.uk>,
Sean Wang <sean.wang@...iatek.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Sergio Paracuellos <sergio.paracuellos@...il.com>,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
linux-staging@...ts.linux.dev, devicetree@...r.kernel.org,
netdev@...r.kernel.org, Weijie Gao <weijie.gao@...iatek.com>,
Chuanhong Guo <gch981213@...il.com>,
René van Dorst <opensource@...rst.com>
Subject: Re: [RFC net-next 1/4] net: phy: add MediaTek PHY driver
On Tue, Apr 06, 2021 at 10:18:16PM +0800, DENG Qingfang wrote:
> Add support for MediaTek PHYs found in MT7530 and MT7531 switches.
Do you know if this PHY is available standalone?
> +static int mt7531_phy_config_init(struct phy_device *phydev)
> +{
> + mtk_phy_config_init(phydev);
> +
> + /* PHY link down power saving enable */
> + phy_set_bits(phydev, 0x17, BIT(4));
> + phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, 0xc6, 0x300);
> +
> + /* Set TX Pair delay selection */
> + phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x13, 0x404);
> + phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x14, 0x404);
This gets me worried about RGMII delays. We have had bad backwards
compatibility problems with PHY drivers which get RGMII delays wrong.
Since this is an internal PHY, i suggest you add a test to the
beginning of mt7531_phy_config_init():
if (phydev->interface != PHY_INTERFACE_MODE_INTERNAL)
return -EINVAL;
We can then solve RGMII problems when somebody actually needs RGMII.
Andrew
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