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Message-ID: <54b0846e-d633-2a03-2c64-f1f0a85c2410@gmail.com>
Date:   Tue, 6 Apr 2021 18:33:54 +0300
From:   Péter Ujfalusi <peter.ujfalusi@...il.com>
To:     Pratyush Yadav <p.yadav@...com>
Cc:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>,
        Maxime Ripard <mripard@...nel.org>,
        Benoit Parrot <bparrot@...com>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        Alexandre Courbot <acourbot@...omium.org>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Stanimir Varbanov <stanimir.varbanov@...aro.org>,
        Helen Koike <helen.koike@...labora.com>,
        Michael Tretter <m.tretter@...gutronix.de>,
        Peter Chen <peter.chen@....com>,
        Chunfeng Yun <chunfeng.yun@...iatek.com>,
        linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
        dmaengine@...r.kernel.org, Vignesh Raghavendra <vigneshr@...com>,
        Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
Subject: Re: [PATCH 11/16] dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX



On 4/6/21 6:09 PM, Pratyush Yadav wrote:
> On 04/04/21 04:24PM, Péter Ujfalusi wrote:
>> Hi Pratyush,
>>
>> On 3/30/21 8:33 PM, Pratyush Yadav wrote:
>>> The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
>>> have up to 32 threads but the current driver only supports using one. So
>>> add an entry for that one thread.
>>
>> If you are absolutely sure that the other threads are not going to be
>> used, then:
> 
> The opposite in fact. I do expect other threads to be used in the 
> future. But the current driver can only use one so I figured it is 
> better to add just the thread that is currently needed and then I can 
> always add the rest later.
> 
> Why does this have to be a one-and-done deal? Is there anything wrong 
> with adding the other threads when the driver can actually use them?

You can skip CCing DMAengine (and me ;) ). Less subsystems is the better
when sending patches...

> 
>> Acked-by: Peter Ujfalusi <peter.ujfalusi@...il.com>
>>
>> but I would consider adding the other threads if there is a chance that
>> the cs2rx will need to support it in the future.
>>
>>> Signed-off-by: Pratyush Yadav <p.yadav@...com>
>>> ---
>>>  drivers/dma/ti/k3-psil-j721e.c | 10 ++++++++++
>>>  1 file changed, 10 insertions(+)
>>>
>>> diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c
>>> index 7580870ed746..19ffa31e6dc6 100644
>>> --- a/drivers/dma/ti/k3-psil-j721e.c
>>> +++ b/drivers/dma/ti/k3-psil-j721e.c
>>> @@ -58,6 +58,14 @@
>>>  		},					\
>>>  	}
>>>  
>>> +#define PSIL_CSI2RX(x)					\
>>> +	{						\
>>> +		.thread_id = x,				\
>>> +		.ep_config = {				\
>>> +			.ep_type = PSIL_EP_NATIVE,	\
>>> +		},					\
>>> +	}
>>> +
>>>  /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
>>>  static struct psil_ep j721e_src_ep_map[] = {
>>>  	/* SA2UL */
>>> @@ -138,6 +146,8 @@ static struct psil_ep j721e_src_ep_map[] = {
>>>  	PSIL_PDMA_XY_PKT(0x4707),
>>>  	PSIL_PDMA_XY_PKT(0x4708),
>>>  	PSIL_PDMA_XY_PKT(0x4709),
>>> +	/* CSI2RX */
>>> +	PSIL_CSI2RX(0x4940),
>>>  	/* CPSW9 */
>>>  	PSIL_ETHERNET(0x4a00),
>>>  	/* CPSW0 */
>>>
>>
>> -- 
>> Péter
> 

-- 
Péter

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