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Message-ID: <4e374b74-3587-b5d8-2c5c-a8ab184d8858@redhat.com>
Date: Wed, 7 Apr 2021 16:23:07 +0200
From: Hans de Goede <hdegoede@...hat.com>
To: "David E. Box" <david.e.box@...ux.intel.com>,
irenic.rajneesh@...il.com, mgross@...ux.intel.com,
gayatri.kammela@...el.com
Cc: platform-driver-x86@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/9] platform/x86: intel_pmc_core: Don't use global pmcdev
in quirks
Hi,
On 4/1/21 5:05 AM, David E. Box wrote:
> The DMI callbacks, used for quirks, currently access the PMC by getting
> the address a global pmc_dev struct. Instead, have the callbacks set a
> global quirk specific variable. In probe, after calling dmi_check_system(),
> pass pmc_dev to a function that will handle each quirk if its variable
> condition is met. This allows removing the global pmc_dev later.
>
> Signed-off-by: David E. Box <david.e.box@...ux.intel.com>
Thanks, patch looks good to me:
Reviewed-by: Hans de Goede <hdegoede@...hat.com>
Regards,
Hans
> ---
> drivers/platform/x86/intel_pmc_core.c | 19 ++++++++++++++++---
> 1 file changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
> index b5888aeb4bcf..260d49dca1ad 100644
> --- a/drivers/platform/x86/intel_pmc_core.c
> +++ b/drivers/platform/x86/intel_pmc_core.c
> @@ -1186,9 +1186,15 @@ static const struct pci_device_id pmc_pci_ids[] = {
> * the platform BIOS enforces 24Mhz crystal to shutdown
> * before PMC can assert SLP_S0#.
> */
> +static bool xtal_ignore;
> static int quirk_xtal_ignore(const struct dmi_system_id *id)
> {
> - struct pmc_dev *pmcdev = &pmc;
> + xtal_ignore = true;
> + return 0;
> +}
> +
> +static void pmc_core_xtal_ignore(struct pmc_dev *pmcdev)
> +{
> u32 value;
>
> value = pmc_core_reg_read(pmcdev, pmcdev->map->pm_vric1_offset);
> @@ -1197,7 +1203,6 @@ static int quirk_xtal_ignore(const struct dmi_system_id *id)
> /* Low Voltage Mode Enable */
> value &= ~SPT_PMC_VRIC1_SLPS0LVEN;
> pmc_core_reg_write(pmcdev, pmcdev->map->pm_vric1_offset, value);
> - return 0;
> }
>
> static const struct dmi_system_id pmc_core_dmi_table[] = {
> @@ -1212,6 +1217,14 @@ static const struct dmi_system_id pmc_core_dmi_table[] = {
> {}
> };
>
> +static void pmc_core_do_dmi_quirks(struct pmc_dev *pmcdev)
> +{
> + dmi_check_system(pmc_core_dmi_table);
> +
> + if (xtal_ignore)
> + pmc_core_xtal_ignore(pmcdev);
> +}
> +
> static int pmc_core_probe(struct platform_device *pdev)
> {
> static bool device_initialized;
> @@ -1253,7 +1266,7 @@ static int pmc_core_probe(struct platform_device *pdev)
> mutex_init(&pmcdev->lock);
> platform_set_drvdata(pdev, pmcdev);
> pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit();
> - dmi_check_system(pmc_core_dmi_table);
> + pmc_core_do_dmi_quirks(pmcdev);
>
> /*
> * On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when
>
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