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Message-ID: <YG3O6rpx2bSt5D+O@hirez.programming.kicks-ass.net>
Date: Wed, 7 Apr 2021 17:25:30 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Like Xu <like.xu@...ux.intel.com>
Cc: Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>, eranian@...gle.com,
andi@...stfloor.org, kan.liang@...ux.intel.com,
wei.w.wang@...el.com, Wanpeng Li <wanpengli@...cent.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
x86@...nel.org, linux-kernel@...r.kernel.org,
Andi Kleen <ak@...ux.intel.com>,
Luwei Kang <luwei.kang@...el.com>
Subject: Re: [PATCH v4 07/16] KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR
emulation for extended PEBS
On Mon, Mar 29, 2021 at 01:41:28PM +0800, Like Xu wrote:
> + if (vcpu->arch.perf_capabilities & PERF_CAP_PEBS_FORMAT) {
> + if (vcpu->arch.perf_capabilities & PERF_CAP_PEBS_BASELINE) {
> + pmu->pebs_enable_mask = ~pmu->global_ctrl;
> + pmu->reserved_bits &= ~ICL_EVENTSEL_ADAPTIVE;
> + for (i = 0; i < pmu->nr_arch_fixed_counters; i++)
> + pmu->fixed_ctr_ctrl_mask &=
> + ~(1ULL << (INTEL_PMC_IDX_FIXED + i * 4));
{ }
> + } else
> + pmu->pebs_enable_mask = ~((1ull << pmu->nr_arch_gp_counters) - 1);
{ }
> + } else {
> + vcpu->arch.perf_capabilities &= ~PERF_CAP_PEBS_MASK;
as you already do here..
> + }
> }
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