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Message-Id: <20210407030948.3845-1-Zhiqiang.Hou@nxp.com>
Date: Wed, 7 Apr 2021 11:09:42 +0800
From: Zhiqiang Hou <Zhiqiang.Hou@....com>
To: linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
lorenzo.pieralisi@....com, robh+dt@...nel.org, bhelgaas@...gle.com,
shawnguo@...nel.org, leoyang.li@....com,
gustavo.pimentel@...opsys.com
Cc: minghuan.Lian@....com, mingkai.hu@....com, roy.zang@....com,
Hou Zhiqiang <Zhiqiang.Hou@....com>
Subject: [PATCHv5 0/6] PCI: layerscape: Add power management support
From: Hou Zhiqiang <Zhiqiang.Hou@....com>
This patch series is to add PCIe power management support for NXP
Layerscape platforms.
Hou Zhiqiang (6):
PCI: layerscape: Change to use the DWC common link-up check function
dt-bindings: pci: layerscape-pci: Add a optional property big-endian
arm64: dts: layerscape: Add big-endian property for PCIe nodes
dt-bindings: pci: layerscape-pci: Update the description of SCFG
property
arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes
PCI: layerscape: Add power management support
.../bindings/pci/layerscape-pci.txt | 6 +-
.../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 1 +
.../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 6 +
.../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +
drivers/pci/controller/dwc/pci-layerscape.c | 450 ++++++++++++++----
drivers/pci/controller/dwc/pcie-designware.h | 1 +
6 files changed, 370 insertions(+), 97 deletions(-)
--
2.17.1
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